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twsi: some variants clear interrupt flag by writing 0, others by writing 1
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Authored by avg on Sep 3 2020, 8:23 AM.
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Details

Summary

Make that distinction more explicit and regular in the code.
The difference in behavior is documented in the respective datasheets.

Previously, the code handled the distinction by writing the control
register multiple times where at least one write was zero and another
was one.

This can be considered a follow-up to rS363021.

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rS FreeBSD src repository - subversion
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Buildable 33353
Build 30662: arc lint + arc unit

Event Timeline

avg requested review of this revision.Sep 3 2020, 8:23 AM

Mhm I was sure that the read was needed and I think it was H3 that I tested that with, but since you have H3 I guess I was wrong.

This revision is now accepted and ready to land.Sep 3 2020, 9:31 AM