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Port x86 busdma to ARM64
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Authored by zbb on Apr 23 2015, 6:07 PM.
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Details

Summary

The x86 busdma subsystem allows using multiple implementations.
By default the classic bounce buffer approach is used, however
on systems with IOMMU it could be in runtime switched to more
efficient hardware accelerated implementation.

This commit adds ARM64 port of the x86 busdma framework and bounce
buffer backend. It is ready to use on IO coherent systems. If the
IO coherency cannot be guaranteed, the cache management operations have
to be added to this code in places marked by /* XXX ARM64TODO (...) */
comments. Also IOMMU support might be added by registering another
busdma implementation like it is already done on the x86.

Obtained from: Semihalf
Sponsored by: The FreeBSD Foundation

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zbb retitled this revision from to Port x86 busdma to ARM64.
zbb updated this object.
zbb edited the test plan for this revision. (Show Details)
zbb added reviewers: emaste, ian, imp, andrew.
zbb added a subscriber: Unknown Object (MLST).

The lack of cache handling makes this unusable for a large amount of hardware that doesn't have cache-coherent DMA.

skra added inline comments.
sys/arm64/arm64/busdma_bounce.c
1007

Just a note that vaddr should be replaced by addr. See r282120.

sys/arm64/arm64/busdma_bounce.c
1007

Oh. Great thanks!

sys/arm64/arm64/busdma_bounce.c
1007

As an aside, if you use Phabricator style rev numbers (rS282120) it will automatically link to the revision.
rS = src
rP = ports
rD = docs

sys/arm64/arm64/busdma_bounce.c
406

Can you add an ARM64TODO for easy grepping later on

sys/arm64/include/bus_dma.h
1–34 ↗(On Diff #4971)

This (entire file) change should be reverted

sys/arm64/include/bus_dma_impl.h
33

s/ARM64/MACHINE/ in the include guards

sys/arm64/arm64/busdma_bounce.c
406

This one is actually a copy-paste from x86, present in all copies like sparc, powerpc, etc.
Still change it to ARM64TODO?

zbb edited edge metadata.
In D2357#43295, @andrew wrote:

The lack of cache handling makes this unusable for a large amount of hardware that doesn't have cache-coherent DMA.

The commit description has already said that and we have ARM64TODOs in the file. This commit is still less unusable than the previous implementation.

sys/arm64/arm64/busdma_bounce.c
134 ↗(On Diff #5182)

Style?

936 ↗(On Diff #5182)

Extra indentation

sys/arm64/arm64/busdma_bounce.c
134 ↗(On Diff #5182)

Right,

Long parameter lists are wrapped with a normal four space indent.

405 ↗(On Diff #5182)

No, I'd leave this.

andrew edited edge metadata.

Only a few minor issues.

sys/arm64/arm64/busdma_bounce.c
202

Wouldn't error already be zero in this case?

323

Extra braces

sys/arm64/arm64/busdma_machdep.c
127

Could you provide a better error string here?

133

We only return a NULL tag on some failures? There is a case on the previous line where it could fail without the tag set.

sys/arm64/include/bus_dma_impl.h
32

There should be no tab after #ifndef

This revision is now accepted and ready to land.May 7 2015, 4:17 PM
emaste edited edge metadata.
emaste added inline comments.
sys/arm64/arm64/busdma_bounce.c
323

I'd argue that if one side of an else has braces the other should be allowed to as well, even if technically contrary to style(9).