amdsbwd, intpm: Add Hygon Dhyana support

[puwen_hygon.cn]

Summary

Initialize the FCH SMBus controller for Hygon Dhyana CPU.

Set the vendor of the FCH description via the exact CPU vendor.

[puwen_hygon.cn]

Show more context.

head/sys/dev/amdsbwd/amd_chipset.h

  */
 #define AMDSB_SMBUS_DEVID               0x43851002
 #define AMDSB8_SMBUS_REVID              0x40
 #define AMDFCH_SMBUS_DEVID              0x780b1022
 #define AMDFCH41_SMBUS_REVID            0x41
 #define AMDCZ_SMBUS_DEVID               0x790b1022
 #define AMDCZ49_SMBUS_REVID             0x49
 
+#define HYGONCZ_SMBUS_DEVID             0x790b1d94
+

head/sys/dev/amdsbwd/amdsbwd.c

 #include <sys/eventhandler.h>
 #include <sys/kernel.h>
 #include <sys/module.h>
 #include <sys/systm.h>
 #include <sys/sysctl.h>
 #include <sys/bus.h>
 #include <machine/bus.h>
 #include <sys/rman.h>
+#include <machine/cputypes.h>
+#include <machine/md_var.h>
 #include <machine/resource.h>
 #include <sys/watchdog.h>
 
 #include <dev/pci/pcivar.h>
 #include <dev/amdsbwd/amd_chipset.h>
 #include <isa/isavar.h>
 
 /*
amdsbwd_identify(driver_t *driver, device_t parent)
          * Try to identify SB600/SB7xx by PCI Device ID of SMBus device
          * that should be present at bus 0, device 20, function 0.
          */
         smb_dev = pci_find_bsf(0, 20, 0);
         if (smb_dev == NULL)
                 return;
         if (pci_get_devid(smb_dev) != AMDSB_SMBUS_DEVID &&
             pci_get_devid(smb_dev) != AMDFCH_SMBUS_DEVID &&
-            pci_get_devid(smb_dev) != AMDCZ_SMBUS_DEVID)
+            pci_get_devid(smb_dev) != AMDCZ_SMBUS_DEVID &&
+            pci_get_devid(smb_dev) != HYGONCZ_SMBUS_DEVID)
                 return;
 
         child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, "amdsbwd", -1);
         if (child == NULL)
                 device_printf(parent, "add amdsbwd child failed\n");
 }
 
 

 #endif
         device_set_desc(dev, "AMD SB8xx/SB9xx/Axx Watchdog Timer");
 }
 
 static void
 amdsbwd_probe_fch41(device_t dev, struct resource *pmres, uint32_t *addr)
 {
         uint8_t val;
+        char buf[36];
 
         val = pmio_read(pmres, AMDFCH41_PM_ISA_CTRL);
         if ((val & AMDFCH41_MMIO_EN) != 0) {
                 /* Fixed offset for the watchdog within ACPI MMIO range. */
                 amdsbwd_verbose_printf(dev, "ACPI MMIO range is enabled\n");
                 *addr = AMDFCH41_MMIO_ADDR + AMDFCH41_MMIO_WDT_OFF;
         } else {
                 /*
#endif
         val &= ~AMDFCH41_WDT_EN_MASK;
         val |= AMDFCH41_WDT_ENABLE;
         pmio_write(pmres, AMDFCH41_PM_DECODE_EN3, val);
 #ifdef AMDSBWD_DEBUG
         val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN3);
         amdsbwd_verbose_printf(dev, "AMDFCH41_PM_DECODE_EN3 value = %#04x\n",
             val);
 #endif
-        device_set_desc(dev, "AMD FCH Rev 41h+ Watchdog Timer");
+        snprintf(buf, sizeof(buf), "%s FCH Rev 41h+ Watchdog Timer",
+            cpu_vendor_id == CPU_VENDOR_HYGON ? "Hygon" : "AMD");
+        device_set_desc_copy(dev, buf);
 }
 
 static int
 amdsbwd_probe(device_t dev)
 {
         struct resource         *res;
         device_t                smb_dev;
         uint32_t                addr;

head/sys/dev/intpm/intpm.c

 #if 0
         /* Not a good idea yet, this stops isab0 functioning */
         { 0x02001166, "ServerWorks OSB4" },
 #endif
         { 0x43721002, "ATI IXP400 SMBus Controller" },
         { AMDSB_SMBUS_DEVID, "AMD SB600/7xx/8xx/9xx SMBus Controller" },
         { AMDFCH_SMBUS_DEVID, "AMD FCH SMBus Controller" },
         { AMDCZ_SMBUS_DEVID, "AMD FCH SMBus Controller" },
+        { HYGONCZ_SMBUS_DEVID, "Hygon FCH SMBus Controller" },
 };
 
 static int
 intsmb_probe(device_t dev)
 {
         const struct intsmb_device *isd;
         uint32_t devid;
         size_t i;
case 0x719b8086:        /* Intel 82443MX */
                 break;
 #endif
         case AMDSB_SMBUS_DEVID:
                 if (pci_get_revid(dev) >= AMDSB8_SMBUS_REVID)
                         sc->sb8xx = 1;
                 break;
         case AMDFCH_SMBUS_DEVID:
         case AMDCZ_SMBUS_DEVID:
+        case HYGONCZ_SMBUS_DEVID:
                 sc->sb8xx = 1;
                 break;
         }
 
         if (sc->sb8xx) {
                 error = sb8xx_attach(dev);
                 if (error != 0)
                         goto fail;