powerpc: Use doorbell interrupts as IPIs where supported

[jhibbits]

Summary

Doorbells (msgsnd) are faster than PIC-managed IPIs. They're supported
by Book-E from PowerISA 2.06, and Book-S from PowerISA 2.07.

When IFuncs are available, we can migrate from one dispatch function
handling both cases, to two distinct dispatch functions.

[luporl]

sys/powerpc/aim/aim_machdep.c

375

Shouldn't this be FEATURE2_ARCH_2_07, that also supports msgsnd?

Then, if ARCH 2.07 can/should be supported, it seems 2 versions of hyperdbelltrapcode would be needed: one that executes msgsync, and another one that doesn't, right?

sys/powerpc/aim/trap_subr64.S

480

This comment is misleading, as the branch is really to hyperdoorbelltrap.

sys/powerpc/powerpc/mp_machdep.c

186–189

It seems to me there is a mismatch between this code and that of aim_machdep.c, as here you check for ARCH_2_07 and there for ARCH_3_00.

410

What instruction is 0x7c00019c? A comment would really help here.

450–453

This part needs comments to describe what instructions corresponds to 0x7c00019c and 0x7c0001dc. The name of each instruction would be enough.

[jhibbits]

sys/powerpc/aim/aim_machdep.c

375

No, the reason I special case Isa 3.0 is that it needs msgsync before actually taking the interrupt. That may not be the case, I didn't test is it could work with just the atomic operations we already year. Other than msgsync, there is no difference from hypertrap.

sys/powerpc/powerpc/mp_machdep.c

410

See the next line. I'll re-sort them.

[luporl]

sys/powerpc/aim/aim_machdep.c

375

Ok, this is fine then.

sys/powerpc/powerpc/mp_machdep.c

186–189

Not an issue, as aim_machdep.c needs specific hypertrap code for ARCH_3_00 only.

[jhibbits]

I'll put this aside for now, and revisit when we get ifuncs. It's best to have the platform provide the IPI function than to try to handle everything in a giant conditional block.