In theory the barriers are required to cope with write combining and
reordering. Two barriers are added (sometimes merged to one):
- Before the first write to guarantee that previous writes to the region have been done
- Before the last write to guarantee that write to the last dword/qword is done after previous writes
Barriers are inserted before in the assumption that it is better to
postpone barriers as much as it is possible (more chances that the
operation has already been already done and barrier does not stall CPU).
On x86 and amd64 bus space write barriers are just compiler memory barriers
which are definitely required.
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