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Fix timer frequency
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Authored by br on Mar 27 2019, 3:35 PM.
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Details

Summary

Grab timer frequency from FDT.

RISC-V timer has no dedicated node and we have to grab timebase frequency from cpus node.

Test Plan

Tested on GFE (Government Furnished Equipment) P2 chisel core synthesized on VCU118

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Event Timeline

markj added inline comments.
sys/riscv/riscv/timer.c
170 ↗(On Diff #55501)

Perhaps the prints should be under a if (bootverbose)?

This revision is now accepted and ready to land.Mar 27 2019, 3:41 PM
This revision was automatically updated to reflect the committed changes.