Do not flush cache for PCIe config window.

[kib]

Summary

Apparently AMD machines cannot tolerate this. This was uncovered by r33938, where cache flush started really flushing the requested range.

Introduce pmap_mapdev_pciecfg(), which simply does not flush cache comparing with pmap_mapdev(). It assumes that the MCFG region was never accessed through the cacheable mapping, which is most likely true for machine to boot at all.

Note that i386 does not need the change, since the architecture handles access per-page due to the KVA shortage, and page remapping already does not flush the cache.

Reported by: mjg, Mike Tancsa <[e-mail]>
Tested by: mjg

[alc]

sys/amd64/amd64/pmap.c

7103 ↗

(On Diff #49294)

Please anything besides _attr1. :-) Perhaps, pmap_mapdev_attr_flags(), pmap_mapdev_flags(), or pmap_mapdev_internal()?

7137 ↗

(On Diff #49294)

As an aside, this snippet appears to violate the architectural mandate that all mappings have the same mode. :-(