Differential D17446

powerpc/spe: Implement SPE exception handling
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Authored by jhibbits on Oct 6 2018, 12:37 AM.

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rS339514: powerpcspe: Implement SPE exception handling

Summary

The Signal Processing Engine (SPE) found in Freescale e500 cores (and
others) offloads IEEE-754 compliance (NaN, Inf handling, overflow,
underflow) to software, most likely as a means of simplifying the APU
silicon. Some software, like AbiWord, needs full IEEE-754 compliance,
including NaN handling. Implement the necessary bits to enable it.

Test Plan

Tested on a P1022, both a simple floating point program and polkitd.
polkitd uses spidermonkey, and is a great test for FPU conformance.

Diff Detail

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Unit

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Build Status

Buildable 20021
Build 19525: arc lint + arc unit

Event Timeline

jhibbits created this revision.Oct 6 2018, 12:37 AM

Harbormaster completed remote builds in B20021: Diff 48817.Oct 6 2018, 12:37 AM

Aside from one inline note, this looks OK for non-SPE.

sys/powerpc/booke/spe.c
126	Doesn't this break on non-SPE systems?

jhibbits marked 2 inline comments as done.Oct 11 2018, 8:28 PM

jhibbits added inline comments.

sys/powerpc/booke/spe.c
126	spe.c is only built for powerpcspe, so no :)

jhibbits marked an inline comment as done.Oct 11 2018, 8:29 PM

This revision was not accepted when it landed; it landed in state Needs Review.Oct 21 2018, 12:43 AM

Closed by commit rS339514: powerpcspe: Implement SPE exception handling (authored by jhibbits). · Explain Why

This revision was automatically updated to reflect the committed changes.

Herald added a subscriber: imp. · View Herald TranscriptOct 21 2018, 12:43 AM

Revision Contents
Changeset List

Path

Size

sys/

powerpc/

booke/

booke_machdep.c

8 lines

450 lines

22 lines

include/

27 lines

2 lines

powerpc/

8 lines

4 lines

Diff 48817

sys/powerpc/booke/booke_machdep.c

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sys/powerpc/booke/spe.c

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sys/powerpc/booke/trap_subr.S

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sys/powerpc/include/spr.h

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sys/powerpc/include/trap.h

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sys/powerpc/powerpc/exec_machdep.c

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sys/powerpc/powerpc/swtch32.S

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