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Designware I2C: Fix IO Timeout issue with I2C controller in AMD platforms
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Authored by rajfbsd_gmail.com on Aug 15 2018, 1:01 PM.

Details

Summary

This patch is a port of the below Linux fix done for IO timeout issue with Designware I2C controllers in AMD platforms.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2d244c81481fa5142a2ba6656ab7a8e40c849c27

Issue is, AMD I2C controller can't trigger pending interrupt if interrupt status has been changed after clearing interrupt status bits, due to some hardware limitation. So, I2C will lose the interrupt and IO will be timed out. This patch implements a workaround to disable I2C controller interrupt and re-enable I2C interrupt before existing interrupt handler.

In FreeBSD Designware I2C driver, the INTR_MASK is cleared and re-enabled during every transfer (using set_controller). But chances are likely that, if interrupt status changes while handling the previous interrupt (where the interrupts are cleared), interrupt may not be triggered due to the same limitation. It may have to wait until the next I2C transfer happens to re-enable the interrupts.

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Event Timeline

gonzo accepted this revision.Aug 21 2018, 11:27 PM
This revision is now accepted and ready to land.Aug 21 2018, 11:27 PM
This revision was automatically updated to reflect the committed changes.
avg added a subscriber: avg.Aug 23 2018, 7:01 AM
avg added inline comments.
head/sys/dev/ichiic/ig4_iic.c
732

Missing space after 'if'.

734

Ditto.