i2c support for rt soc.
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sys/mips/mediatek/mtk_iic.c | ||
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156–167 | Could you please remove child "iicbus" if not NULL? mtx_destroy?
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172–175 | "style(9)" :) | |
397–399 | To remove? | |
418 | IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER ? | |
sys/mips/mediatek/mtk_iic.h | ||
44–65 | Please use space between #define and macro name | |
70 | As I understand, 333MHz is specific for RT2880, isn't it? For any other SoC, it can be different from 333. |
IMO, this entire driver is wrong. Because of the way the hardware works, it cannot support the start, repeat_start, stop, read, and write methods for iicbus_if, and it must not try to "fake" that support. It must implement only callback, reset, and transfer. The transfer method should be basically just
one time, maybe in reset(), set RA_I2C_CONFIG reg to I2C_CONFIG_ADDRLEN(I2C_CONFIG_ADDRLEN_8) | I2C_CONFIG_DEVADLEN(I2C_CONFIG_DEVADLEN_7) | I2C_CONFIG_ADDRDIS; in transfer method: for each msg set RA_I2C_DEVADDR reg to msg.slave >> 1 set RA_I2C_BYTECNT reg to msg.len set RA_I2C_STARTXFER reg to either OP_READ or OP_WRITE loop to transfer all the bytes into/out-of msg.buf
There is an example of a transfer-only driver in sys/arm/broadcom/bcm2835/bcm2835_bsc.c, but it is a bit complex because it uses interrupts, and it uses a hardware quirk to make repeat-start work.
sys/mips/mediatek/mtk_iic.h | ||
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44–65 | style(9) requires a tab after #define |
sys/mips/mediatek/mtk_iic.h | ||
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44–65 | Of course, a tab. Sorry, mistype. |
sys/boot/fdt/dts/mips/fbsd-rt2880.dtsi | ||
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1 ↗ | (On Diff #34273) | The dtsi file changes do not belong with this change. They should be in a separate review IMO.
#include "fbsd-rt2880.dtsi"
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sys/mips/mediatek/mtk_iic.c | ||
2 | I agree with the comment by @ian - I think we should only implement callback, reset and transfer and we should not try to fake what the SoC cannot do. |
sys/mips/mediatek/mtk_iic.h | ||
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70 | It is correct. I put this setting to dts file. |