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Decode AMD RAS Capabilities and enable MCA thresholding on 17h (two commits)
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Authored by cem on Sep 5 2017, 10:50 PM.
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Details

Summary

Store AMD RAS Capabilities cpuid value and name flags

x86 MCA: Enable AMD thresholding support on 17h

17h supports MCA thresholding in the same way as 16h and earlier.
Supposedly a ScalableMca feature bit in CPUID 8000_0007:EBX must be set, but
that was not true for earlier models, so be careful about relying on it.

While here, document a missing bit in LS MCA MISC0.

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Buildable 11381
Build 11742: arc lint + arc unit

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Builds fine and doesn't cause any obvious breakage on my Ryzen. This feature does appear to be detected properly.

This revision is now accepted and ready to land.Sep 7 2017, 5:56 PM
This revision was automatically updated to reflect the committed changes.