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Because of AArch64's weak memory consistency model, we need to include a

Description

Because of AArch64's weak memory consistency model, we need to include a
memory barrier between the stores for initializing a page table page and
the store for adding that page to the page table. Otherwise, a page table
walk by another processor's MMU could see the page table page before it
sees the initialized entries.

Simplify pmap_growkernel(). In particular, eliminate an unnecessary TLB
invalidation.

Reviewed by: andrew, markj
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D21126

Details

Committed
alcAug 2 2019, 10:36 PM
Reviewer
andrew
Differential Revision
D21126: Fixes to page table page mapping
Parents
rS350545: MFC r350228:
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