HomeFreeBSD

MFC: r347222

Description

MFC: r347222

o Avoid determining the MAC class (LEM/EM or IGB) - possibly even multiple

times - on every interrupt by using an own set of device methods for the
IGB class. This translates to introducing igb_if_intr_{disable,enable}()
and igb_if_{rx,tx}_queue_intr_enable() with that IGB-specific code moved
out of their EM counterparts and otherwise continuing to use the EM IFDI
methods also for IGB.
Note that igb_if_intr_{disable,enable}() also issue E1000_WRITE_FLUSH as
lost with the conversion of igb(4) to iflib(4).
Also note, that the em_if_{disable,enable}_intr() methods are renamed to
em_if_intr_{disable,enable}() for consistency with the names used in the
interface declaration.

o In em_intr():

  • Don't bother to bail out if the interrupt type is "legacy", i. e. INTx or MSI, as iflib(4) doesn't use ift_legacy_intr methods for MSI-X. All other iflib(4)-based drivers avoid this check, too.
  • Given that only the MSI-X interrupts have one-shot behavior (by taking advantage of the EIAC register), explicitly disable interrupts. Hence, em_intr() now matches what {em,igb}_irq_fast() previously did (in case of igb(4) supposedly also to work around MSI message reordering errata on certain systems).

o In em_if_intr_disable():

  • Clear the EIAC register unconditionally for 82574 and not just in case of MSI-X, matching em_if_intr_enable() and bringing back the last hunk of r206437 lost with the iflib(4) conversion.
  • Write to EM_EIAC for clearing said register instead of to the IGB-only E1000_EIAC used ever since the iflib(4) conversion.

Reviewed by: shurd
Differential Revision: https://reviews.freebsd.org/D20176

Details

Committed
mariusJun 16 2019, 3:30 PM
Reviewer
shurd
Differential Revision
D20176: e1000: Correct and optimize interrupt handling
Parents
rS349112: MFC: r347221, r347245
Branches
Unknown
Tags
Unknown