HomeFreeBSD

Provide a template for busdma code for RISC-V.

Description

Provide a template for busdma code for RISC-V.

RISC-V ISA specifies no cache management instructions so leave cache
operations in cpufunc.h as no-op for now.

Note some new hardware comes with their own memory-mapped cache
management controller.

Tested on HiFive Unleashed board with cgem(4).

Reviewed by: markj
Obtained from: arm64
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D20126

Details

Provenance
brAuthored on
Reviewer
markj
Differential Revision
D20126: busdma support for RISC-V
Parents
rS347224: Use @generated tag in generated files
Branches
Unknown
Tags
Unknown