Differential D19819

Implement pic_pre_ithread(), pic_post_ithread()
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Authored by br on Apr 4 2019, 12:17 PM.

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imp

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markj

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rS346633: Implement pic_pre_ithread(), pic_post_ithread().

Summary

These are required to properly handle interrupts in the interrupt thread.

Instead of disable/enable interrupts in pre_ithread()/post_ithread() respectively, play with priority register (priority 0 effectively disables interrupt on all the cores).

Test Plan

Tested with Cadence network adapter on HiFive Unleashed

Diff Detail

Repository

rS FreeBSD src repository - subversion

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Lint Not Applicable

Unit

Tests Not Applicable

Event Timeline

br created this revision.Apr 4 2019, 12:17 PM

markj accepted this revision.Apr 4 2019, 11:05 PM

This revision is now accepted and ready to land.Apr 4 2019, 11:05 PM

Closed by commit rS346633: Implement pic_pre_ithread(), pic_post_ithread(). (authored by br). · Explain WhyApr 24 2019, 1:42 PM

This revision was automatically updated to reflect the committed changes.

Herald added a subscriber: imp. · View Herald TranscriptApr 24 2019, 1:42 PM

Revision Contents
Changeset List

Path

Size

head/

sys/

riscv/

plic.c

26 lines

Diff 56584

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head/sys/riscv/riscv/plic.c

Implement pic_pre_ithread(), pic_post_ithread()ClosedPublicActions