Add definitions for MIPS32/64 Rev 2 CPUs that provide an intctl register.
This can be used to:
- Identify the CPU's internal timer interrupt #.
- Identify the CPU's performance counter overflow interrupt #.
- Control interrupt vector spacing.
Details
Details
- Reviewers
adrian - Commits
- rS323621: Add MIPS32/64 Rev2 CP0 intctl register definitions.
Confirmed that sane values are returned on a Broadcom MIPS74K.
Diff Detail
Diff Detail
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Buildable 11462 Build 11818: arc lint + arc unit