VSCR was saved and restored through stvewx/lvewx at byte 12 of a
16 byte slot. Which element those instructions move at a given address
depends on the byte order, so on little-endian kernels they touched VR
bits 0-31 instead of the 96-127 where mfvscr/mtvscr keep VSCR: every
context switch and signal reset VSCR to 0, losing NJ and SAT.
Replicate the word into all four elements first so that the element
choice no longer matters.

VSCR[NJ] set with mtvscr read back as 0 after a usleep on a
little-endian kernel; it is preserved now.

MFC after: 1 week