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Differential D5643

Drop armeb freebsd6 compat
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Authored by emaste on Mar 15 2016, 2:47 AM.
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andrew
bz
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rS296948: Remove armeb FreeBSD 6 compat shim
Summary

We can (separately) make it an error to try enabling compat6.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Tests Not Applicable

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emaste updated this revision to Diff 14332.Mar 15 2016, 2:47 AM
emaste retitled this revision from to Drop armeb freebsd6 compat.
emaste updated this object.
emaste edited the test plan for this revision. (Show Details)
emaste added a reviewer: andrew.
emaste added a subscriber: bz.
bz accepted this revision.Mar 15 2016, 11:30 AM
bz added a reviewer: bz.

The patch needs updating after my commit but it seems to be the right thing to do from all I heard from people.

This revision is now accepted and ready to land.Mar 15 2016, 11:30 AM
andrew accepted this revision.Mar 16 2016, 1:41 PM
andrew edited edge metadata.
Closed by commit rS296948: Remove armeb FreeBSD 6 compat shim (authored by emaste). · Explain WhyMar 16 2016, 6:55 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents
Changeset List

PathSize
head/
sys/
arm/
arm/
6 lines

Diff 14369

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head/sys/arm/arm/vm_machdep.c

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la t0, cpu_exception_handler la t0, cpu_exception_handler
csrw stvec, t0 csrw stvec, t0
/* Ensure sscratch is zero */ /* Ensure sscratch is zero */
li t0, 0 li t0, 0
csrw sscratch, t0 csrw sscratch, t0
/* Initialize stack pointer */ /* Initialize stack pointer */
la s3, initstack_end la sp, initstack_end
mv sp, s3
/* Clear frame pointer */
mv s0, zero
/* Allocate space for thread0 PCB and riscv_bootparams */ /* Allocate space for thread0 PCB and riscv_bootparams */
addi sp, sp, -(PCB_SIZE + RISCV_BOOTPARAMS_SIZE) & ~STACKALIGNBYTES addi sp, sp, -(PCB_SIZE + RISCV_BOOTPARAMS_SIZE) & ~STACKALIGNBYTES
/* Clear BSS */ /* Clear BSS */
la s0, _C_LABEL(__bss_start) la t0, _C_LABEL(__bss_start)
la s1, _C_LABEL(_end) la t1, _C_LABEL(_end)
1: 1:
sd zero, 0(s0) sd zero, 0(t0)
addi s0, s0, 8 addi t0, t0, 8
bltu s0, s1, 1b bltu t0, t1, 1b
/* Fill riscv_bootparams */ /* Fill riscv_bootparams */
la t0, pagetable_l1 la t0, pagetable_l1
sd t0, RISCV_BOOTPARAMS_KERN_L1PT(sp) sd t0, RISCV_BOOTPARAMS_KERN_L1PT(sp)
sd s9, RISCV_BOOTPARAMS_KERN_PHYS(sp) sd s9, RISCV_BOOTPARAMS_KERN_PHYS(sp)
la t0, initstack la t0, initstack
sd t0, RISCV_BOOTPARAMS_KERN_STACK(sp) sd t0, RISCV_BOOTPARAMS_KERN_STACK(sp)
li t0, (VM_EARLY_DTB_ADDRESS) li t0, (VM_EARLY_DTB_ADDRESS)
/* Add offset of DTB within superpage */ /* Add offset of DTB within superpage */
li t1, (L2_OFFSET) li t1, (L2_OFFSET)
and t1, a1, t1 and t1, a1, t1
add t0, t0, t1 add t0, t0, t1
sd t0, RISCV_BOOTPARAMS_DTBP_VIRT(sp) sd t0, RISCV_BOOTPARAMS_DTBP_VIRT(sp)
sd a1, RISCV_BOOTPARAMS_DTBP_PHYS(sp) sd a1, RISCV_BOOTPARAMS_DTBP_PHYS(sp)
sd a0, RISCV_BOOTPARAMS_MODULEP(sp) sd a0, RISCV_BOOTPARAMS_MODULEP(sp)
mv a0, sp mv a0, sp
call _C_LABEL(initriscv) /* Off we go */ call _C_LABEL(initriscv) /* Off we go */
call _C_LABEL(mi_startup) call _C_LABEL(mi_startup)
/* We should never reach here, but if so just hang. */
2:
wfi
j 2b
/* /*
* Get the physical address the kernel is loaded to. Returned in s9. * Get the physical address the kernel is loaded to. Returned in s9.
*/ */
get_physmem: get_physmem:
lla t0, virt_map /* physical address of virt_map */ lla t0, virt_map /* physical address of virt_map */
ld t1, 0(t0) /* virtual address of virt_map */ ld t1, 0(t0) /* virtual address of virt_map */
sub t1, t1, t0 /* calculate phys->virt delta */ sub t1, t1, t0 /* calculate phys->virt delta */
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines1:
lw t1, 0(t0) lw t1, 0(t0)
beqz t1, 1b beqz t1, 1b
/* Setup stack pointer */ /* Setup stack pointer */
lla t0, bootstack lla t0, bootstack
ld sp, 0(t0) ld sp, 0(t0)
/* Get the kernel's load address */ /* Get the kernel's load address */
jal get_physmem jal get_physmem
/* Setup supervisor trap vector */ /* Setup supervisor trap vector */
lla t0, mpva lla t0, mpva
sub t0, t0, s9 sub t0, t0, s9
li t1, KERNBASE li t1, KERNBASE
add t0, t0, t1 add t0, t0, t1
csrw stvec, t0 csrw stvec, t0
Show All 27 Lines