Add bcm_clk_periph_set_mux() to implement the clknode_set_mux method,
allowing the clock source to be switched via the control register.
Add bcm_clk_periph_sel_parent() to select the best parent clock when
setting frequency. For clocks with BCM_CLK_PERIPH_NEED_LOW_JITTER flag,
the function prefers integer-only dividers to minimize jitter; otherwise
it picks the first suitable parent.
Integrate parent selection into bcm_clk_periph_set_freq(), which now
calls bcm_clk_periph_sel_parent() before computing the divider and
switches the parent via clknode_set_parent_by_idx() if needed.
Other fixes:
- Fix bitwise operator bug: use & instead of | when testing BCM_CLK_PERIPH_HAVE_MASH in bcm_clk_periph_calc_div()
- Replace magic number 50 with BCM_CLK_PERIPH_BUSY_TIMEOUT_US (100000) in bcm_clk_wait_while_busy()
- Add MODIFY4() macro wrapping CLKDEV_MODIFY_4()
- Add BCM_CLK_PERIPH_NEED_LOW_JITTER flag (bit 1) to the flags field
- Remove blank line after #include <sys/cdefs.h>
- Minor comment style fix in bcm_clk_periph_recalc()