RPI2 - make interrupt dispatching MP safe
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Authored by skra on Sep 23 2015, 1:14 PM.

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andrew
imp
loos

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rS290457: Make interrupt dispatching MP safe. Use GPU interrupt bit in per-core

Summary

GPU (i.e. not per core) interrupts on rpi2 can be routed to only one core which is selectable. It's core 0 after reset. The way how interrupts were dispatched before, a very same interrupt could be handled on more cores in parallel. In other words, only one core is permitted to dispatch GPU interrupts.

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rS FreeBSD src repository - subversion

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skra updated this revision to Diff 8908.Sep 23 2015, 1:14 PM

skra retitled this revision from to RPI2 - make interrupt dispatching MP safe.

skra updated this object.

skra edited the test plan for this revision. (Show Details)

skra added reviewers: andrew, loos.

skra set the repository for this revision to rS FreeBSD src repository - subversion.

skra added a project: ARM.

skra added subscribers: andrew, loos.

Herald added a subscriber: imp. · View Herald TranscriptSep 23 2015, 1:14 PM

imp accepted this revision.Sep 23 2015, 4:40 PM

imp added a reviewer: imp.

This revision is now accepted and ready to land.Sep 23 2015, 4:40 PM

andrew added inline comments.Sep 23 2015, 4:59 PM

sys/arm/broadcom/bcm2835/bcm2835_intr.c
166–167 ↗	(On Diff #8908)	Won't this mean we don't get any interrupts not in bank 3 unless we happen to have a pending gpu interrupt? `bcm2836_get_next_irq` returns `-1` if no bank 3 interrupts are pending, but there may be other interrupts.

skra added inline comments.Sep 23 2015, 8:13 PM

sys/arm/broadcom/bcm2835/bcm2835_intr.c
166–167 ↗	(On Diff #8908)	According to manual I got - GPU interrupt can be high in one core only. My translation is that it can be high only on core to which all GPU interrupts are routed. We can select which core it will be, but the selection is for all GPU interrupts identical. And GPU interrupt on bank3 means that there is pending interrupt on bank0-2. Interrupts on these banks are not-per-core interrupts. If there is an interrupt on bank3, `bcm2836_get_next_irq()` returns its number. Only if there is no interrupt, `-1` is returned. And only if there is `BCM2836_GPU_IRQ` interrupt, there is an interrupt pending on banks 0-2. An `irg` argument passed to `bcm2836_get_next_irq()` is not evaluated inside, so it's okay even in case that there are more GPU interrupts pending in banks 0-2. On the other hand, as bank3 is evaluated firstly and next interrupt can be only the one with higher number, the last_irq should be reset to `-1` if it was from bank3.

loos added inline comments.Sep 24 2015, 3:24 PM

sys/arm/broadcom/bcm2835/bcm2835_intr.c
166–167 ↗	(On Diff #8908)	Let me see if I understood this correctly, you are saying that when there is an interrupt in banks 0-2, BCM2836_GPU_IRQ will always be set in bank 3?

skra added inline comments.Sep 24 2015, 9:35 PM

sys/arm/broadcom/bcm2835/bcm2835_intr.c
166–167 ↗	(On Diff #8908)	Yes, it's what I see and how it works on my rpi2. Futher, I can confirm that BCM2836_GPU_IRQ on bank3 is never high on core 1-3 when bank0-2 interrupts are routed to core 0.