Simply by masking timer interrupts.
Details
Details
- Reviewers
- None
- Group Reviewers
riscv - Commits
- rG25ece2331fe8: riscv timer: implement riscv_timer_et_stop()
rG3a4256dd86f0: riscv timer: implement riscv_timer_et_stop()
Diff Detail
Diff Detail
- Repository
- rG FreeBSD src repository
- Lint
Lint Not Applicable - Unit
Tests Not Applicable