Basing on B.2.3.4: Synchronization and coherency issues between data and instruction accesses. To ensure that modified instructions are visible to all PEs in a shareability domain one need to perform following sequence: 1. Clean D-cache 2. Ensure the visibility of data cleaned from cache 3. Invalidate I-cache 4. Ensure completion 5. In SMP system PE must issue isb to ensure execution of the modified instructions
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