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Add hypervisor trap handling, using HSRR0/HSRR1
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Authored by jhibbits on May 19 2018, 3:34 AM.
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Details

Summary

Some hypervisor exceptions on POWER architecture only save state to HSRR0/HSRR1.
Until we have bhyve on POWER, use a lightweight exception frontend which copies
HSRR0/HSRR1 into SRR0/SRR1, and run the normal trap handler.

The first user of this is the Hypervisor Virtualization Interrupt, which targets
the XIVE interrupt controller on POWER9.

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Approved if you also install it to EXC_HEA.

sys/powerpc/aim/aim_machdep.c
366 ↗(On Diff #42722)

Is this still appropriate if !PSL_HV? I guess the traps should never be called, but you will get a double-fault if they do.

This should also install hypertrap to EXC_HEA, which is a hypervisor exception we do not correctly handle at present.

sys/powerpc/aim/trap_subr64.S
775 ↗(On Diff #42722)

You could use the hsprgs here if you wanted to be really fancy...

This revision is now accepted and ready to land.May 19 2018, 4:05 AM
sys/powerpc/aim/aim_machdep.c
366 ↗(On Diff #42722)

I don't think it matters to install them in !PSL_HV, since if they do get called the CPU is probably in a really insane state and should be rebooted anyways. I would be surprised if hardware doesn't prevent it.

This revision was automatically updated to reflect the committed changes.