Add MIPS32/64 Rev2 intctl cp0 register definitions.

[landonf]

Summary

Add definitions for MIPS32/64 Rev 2 CPUs that provide an intctl register.

This can be used to:

• Identify the CPU's internal timer interrupt #.
• Identify the CPU's performance counter overflow interrupt #.
• Control interrupt vector spacing.

Test Plan

Confirmed that sane values are returned on a Broadcom MIPS74K.

[adrian]