Merge commit 28de0fb48 from llvm git (by Luís Marques):
[RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines The RISCV target did not set the GCC atomic compare and swap defines, unlike other targets. This broke builds for things like glib on RISCV. Patch by Kristof Provost (kprovost) Differential Revision: https://reviews.llvm.org/D91784
This should fix building glib20 on RISC-V and unblock a number of
dependent ports.
Requested by: kp
MFC after: 3 days