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arm64: rockchip: clk_pll: Multiple improvement

Description

arm64: rockchip: clk_pll: Multiple improvement

Remove the mode_val from the clock definition as it's a bit unreadable.
Use mode_shift to represent which bit control the mode in the register.
Simplify some case where we can avoid a register read before changing it.
Set the PLL back to normal mode after the PLL have stabilized.

Discussed with: mmel
MFC after: 1 week

Details

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manuAuthored on
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rS344622: power8_bringup_hacks branch is not needed anymore
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