- If present, take advantage of the R/W cache of eMMC revision 1.5 and later devices. These caches work akin to the ones found in HDDs/SSDs that ada(4)/da(4) also enable if existent, but likewise increase the likelihood of data loss in case of a sudden power outage etc. On the other hand, write performance is up to twice as high for e. g. 1 GiB files depending on the actual chip and transfer mode employed. For maximum data integrity, the usage of eMMC caches can be disabled via the hw.mmcsd.cache tunable.
- Get rid of the NOP mmcsd_open().
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marius Authored on - Parents
- rS333646: Restore style(9) conformance after r320844 (actually requested pre-
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