Fixes for NVIDIA Tegra124 clocks:

• EMC clock have standard peripheral clock block. Use it.
• Implement full frequency set method for PLLD2. This PLL is used as HDMI pixel clock so we must be able to set it to wide range of frequencies, within 5% tolerance allowed by HDMI specification. Due to this, full state space search (over m, n, p fields) is necessary.

MFC after: 3 weeks