TEGRA: Extend timeout for PLLs lock to 5 ms. Real lock time for PLLA
has been very near to old limit.
Description
Description
Details
Details
- Provenance
mmel Authored on - Parents
- rS306549: MFC r306320:
- Branches
- Unknown
- Tags
TEGRA: Extend timeout for PLLs lock to 5 ms. Real lock time for PLLA Tags None Referenced Files None Subscribers None |