The minimim grant and maximum latency PCI config registers are only valid
for type 0 devices, not type 1 or 2 bridges. Don't read them for bridge
devices during bus scans and return an error when attempting to read them
as ivars for bridge devices.
Description
Description
Details
Details
- Provenance
jhb Authored on - Parents
- rS281870: Cosmetic change: use PCIR_SECLAT_2 rather than PCIR_SECLAT_1.
- Branches
- Unknown
- Tags