Add code to set and reset open-drain mode on the bus when requested.

When command and data interrupts have been aggregated together, don't do
the data-completed processing if a command-error interrupt is also asserted.

Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work around
TI OMAP controllers which will return the reset-in-progress bit as zero if
you read the status register too fast after setting the reset bit.