Make the Altera JTAG UART device driver slightly more forgiving of
the foibles of a sub-par hrdware interface by increasing the timeout
for spotting JTAG polling from one to two seconds.

Update comment.

Add a comment about a device-driver race condition that could cause the BERI
pipeline to wedge awaiting JTAG in the event that both the low-level console
and the tty layer decide to write to the JTAG FIFO just before JTAG is
disconnected.  Resolving this race is a bit tricky as it looks like there
isn't a way to 'give the character back' to the tty layer when we discover
the race.  The easy fix is to drop the character, which we don't yet do, but
perhaps should as that is a better outcome than wedging the pipeline.

Add a comment about an inherent race with hardware in the Altera JTAG
UART's low-level console code.