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Disable hwpmc(4) support for Intel Xeon Sandy Bridge (Model 0x2D).
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Description

Disable hwpmc(4) support for Intel Xeon Sandy Bridge (Model 0x2D).
Due to some differences in MSRs between Xeon Sandy Bridge and Core Sandy
Bridge (Model 0x2A), wrmsr() may generate in a GP# fault exception and so a
panic of the machine.

Approved by: gnn (mentor)
MFC after: 3 days

Details

Provenance
davideAuthored on
Parents
rS237195: The variable 'error' in sys_poll() is initialized in declaration to value
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head/
sys/
dev/
hwpmc/

rS237196

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head/sys/dev/hwpmc/hwpmc_intel.c

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