devel/trellis: Add new port
Project trellis document the bitstream for Lattice ECP5 FPGAs.
Used with yosys and nextpnr it can create a full bitstream with only
open source tools.
Description
Description
Details
Details
- Provenance
manu Authored on - Parents
- rP505157: yosys: Update to latest git master
- Branches
- Unknown
- Tags