New port: devel/arachne-pnr

Arachne-pnr implements the place and route step of the hardware
compilation process for FPGAs. It currently targets the Lattice
Semiconductor iCE40 family of FPGAs.

WWW: https://github.com/cseed/arachne-pnr

PR: 227590
Submitted by: Johnny Sorocil <jsorocil@gmail.com>
Differential Revision: https://reviews.freebsd.org/D15632