ntb_hw_intel: fix xeon NTB gen3 bar disable logic
In NTB gen3 driver, it was supposed to disable NTB bar access by
default, but due to incorrect register access method, the bar disable
logic does not work as expected. Those registers should be modified
through NTB bar0 rather than PCI configuration space.
Besides, we'd better to protect ourselves from a bad buddy node so
ingress disable logic should be implemented together.
Submitted by: Austin Zhang (firstname.lastname@example.org)
Sponsored by: Dell EMC
(cherry picked from commit e3cf7ebc1d36d068f1d1a83ea73ce2eed547e3cb)