amd64: invalidate TLB between page table update and access
When setting up trampoline mapping for LA57 switcher, it is possible
that TLB still has some random mapping at that address.
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
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Details
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kib Authored on Apr 16 2021, 6:28 PM - Parents
- rG7b88cd8bbf37: Add myself(oh) as src committer and mentor(manu).
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