Diffusion FreeBSD src repository 20d6c796fae0

arm64: zynqmp: Add clock driver
20d6c796fae0
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Description

arm64: zynqmp: Add clock driver

Add clock and reset drivers for the ZynqMP SoC.
The clocks are discovered by talking to the firmware as the topology isn't
fixed on this SoC.

Differential Revision: https://reviews.freebsd.org/D41812
Sponsored by: Beckhoff Automation GmbH & Co. KG

(cherry picked from commit 4e579ad047720775ab580b74192c7de8a3386fea)

Details

Provenance

manu	Authored on Sep 7 2023, 7:57 AM

Differential Revision

D41812: arm64: zynqmp: Add clock driver

Parents

rGab8f34675ae7: arm64: zynqmp: Add firmware driver

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manu committed rG20d6c796fae0: arm64: zynqmp: Add clock driver (authored by manu).Oct 18 2023, 2:31 PM

manu added an edge: D41812: arm64: zynqmp: Add clock driver.

Changes (15)

Path

Size

sys/

conf/

files.arm64

dev/

clk/

rG20d6c796fae0

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sys/conf/files.arm64

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sys/dev/clk/xilinx/zynqmp_clk_div.c

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sys/dev/clk/xilinx/zynqmp_clk_div.h

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sys/dev/clk/xilinx/zynqmp_clk_fixed.c

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sys/dev/clk/xilinx/zynqmp_clk_fixed.h

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sys/dev/clk/xilinx/zynqmp_clk_gate.c

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sys/dev/clk/xilinx/zynqmp_clk_gate.h

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sys/dev/clk/xilinx/zynqmp_clk_mux.c

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sys/dev/clk/xilinx/zynqmp_clk_mux.h

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sys/dev/clk/xilinx/zynqmp_clk_pll.c

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sys/dev/clk/xilinx/zynqmp_clk_pll.h

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sys/dev/clk/xilinx/zynqmp_clock.c

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sys/dev/clk/xilinx/zynqmp_reset.c

arm64: zynqmp: Add clock driver20d6c796fae0Actions

Description

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Changes (15)

rG20d6c796fae0

sys/conf/files.arm64

sys/dev/clk/xilinx/zynqmp_clk_div.c

sys/dev/clk/xilinx/zynqmp_clk_div.h

sys/dev/clk/xilinx/zynqmp_clk_fixed.c

sys/dev/clk/xilinx/zynqmp_clk_fixed.h

sys/dev/clk/xilinx/zynqmp_clk_gate.c

sys/dev/clk/xilinx/zynqmp_clk_gate.h

sys/dev/clk/xilinx/zynqmp_clk_mux.c

sys/dev/clk/xilinx/zynqmp_clk_mux.h

sys/dev/clk/xilinx/zynqmp_clk_pll.c

sys/dev/clk/xilinx/zynqmp_clk_pll.h

sys/dev/clk/xilinx/zynqmp_clock.c

sys/dev/clk/xilinx/zynqmp_reset.c

arm64: zynqmp: Add clock driver
20d6c796fae0
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