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sys/dts/arm/rt1310a.dtsi
Show First 20 Lines • Show All 100 Lines • ▼ Show 20 Lines | enet1:fv_mac1@A0000 { | ||||
compatible = "fv,ethernet"; | compatible = "fv,ethernet"; | ||||
reg = <0xA0000 0x20000>; | reg = <0xA0000 0x20000>; | ||||
interrupts = <8>; | interrupts = <8>; | ||||
interrupt-parent = <&PIC>; | interrupt-parent = <&PIC>; | ||||
}; | }; | ||||
}; | }; | ||||
pci@19ce0000 { | |||||
compatible = "fv,rt1310-pci"; | |||||
reg = <0x19ce0000 0x4000000 | |||||
0x1dce0000 0x800000 | |||||
0x1e4e0000 0x200000>; | |||||
interrupt-parent = <&PIC>; | |||||
#address-cells = <3>; | |||||
#interrupt-cells = <1>; | |||||
interrupts = <18 19 20 21>; | |||||
interrupt-map-mask = <0x800 0x0 0x0 0x7>; | |||||
interrupt-map = < | |||||
0x800 0 0 1 &PIC 18 | |||||
0x800 0 0 2 &PIC 19 | |||||
0x800 0 0 3 &PIC 20 | |||||
0x800 0 0 4 &PIC 21 | |||||
>; | |||||
}; | |||||
apb@1E800000 { | apb@1E800000 { | ||||
#address-cells = <1>; | #address-cells = <1>; | ||||
#size-cells = <1>; | #size-cells = <1>; | ||||
compatible = "simple-bus"; | compatible = "simple-bus"; | ||||
ranges = <0x0 0x1E800000 0x800000>; | ranges = <0x0 0x1E800000 0x800000>; | ||||
bus-frequency = <75000000>; | bus-frequency = <74346686>; | ||||
timer@000000 { | timer@000000 { | ||||
compatible = "rt,timer"; | compatible = "rt,timer"; | ||||
reg = <0x0 0x10 | reg = <0x0 0x10 | ||||
0x10 0x10 | 0x10 0x10 | ||||
0x20 0x10 | 0x20 0x10 | ||||
0x30 0x10>; | 0x30 0x10>; | ||||
interrupts = <3 4 5>; | interrupts = <3 4 5>; | ||||
Show All 37 Lines |