mvebu_gpio: fix interrupt cause register configuration

According to Armada 8k documentation, the interrupt cause register
(at offset 0x14) is RW0C. Update the configuration in attach and
the mvebu_gpio_isrc_eoi() to follow the description.

Reviewed by: mmel
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D29013

(cherry picked from commit 819760b35f3196227a1d90089fb98ee115e7ed0d)