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Index: ObsoleteFiles.inc
===================================================================
--- ObsoleteFiles.inc
+++ ObsoleteFiles.inc
@@ -38,6 +38,8 @@
# xargs -n1 | sort | uniq -d;
# done
+# 20180430: remove ixgb
+OLD_FILES+=usr/share/man/man4/ixgb.4.gz
# 20180417: remove fuswintr and suswintr
OLD_FILES+=usr/share/man/man9/fuswintr.9.gz
OLD_FILES+=usr/share/man/man9/suswintr.9.gz
Index: UPDATING
===================================================================
--- UPDATING
+++ UPDATING
@@ -51,6 +51,11 @@
****************************** SPECIAL WARNING: ******************************
+20180430:
+ Remove the ixgb(4) device driver. This was an early and uncommon
+ legacy PCI 10GbE device. If you have device ixgb in your kernel
+ config file it must be removed.
+
20180413:
Support for Arcnet networks has been removed. If you have device
arcnet or device cm in your kernel config file they must be
Index: share/man/man4/Makefile
===================================================================
--- share/man/man4/Makefile
+++ share/man/man4/Makefile
@@ -244,7 +244,6 @@
iwmfw.4 \
iwn.4 \
iwnfw.4 \
- ixgb.4 \
ixgbe.4 \
ixl.4 \
ixlv.4 \
@@ -676,7 +675,6 @@
MLINKS+=iwi.4 if_iwi.4
MLINKS+=iwm.4 if_iwm.4
MLINKS+=iwn.4 if_iwn.4
-MLINKS+=ixgb.4 if_ixgb.4
MLINKS+=ixgbe.4 ix.4
MLINKS+=ixgbe.4 if_ix.4
MLINKS+=ixgbe.4 if_ixgbe.4
Index: share/man/man4/ixgb.4
===================================================================
--- share/man/man4/ixgb.4
+++ share/man/man4/ixgb.4
@@ -1,125 +0,0 @@
-.\" Copyright (c) 2001-2004, Intel Corporation
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions are met:
-.\"
-.\" 1. Redistributions of source code must retain the above copyright notice,
-.\" this list of conditions and the following disclaimer.
-.\"
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" 3. Neither the name of the Intel Corporation nor the names of its
-.\" contributors may be used to endorse or promote products derived from
-.\" this software without specific prior written permission.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.\" * Other names and brands may be claimed as the property of others.
-.\"
-.\" $FreeBSD$
-.\"
-.Dd August 18, 2006
-.Dt IXGB 4
-.Os
-.Sh NAME
-.Nm ixgb
-.Nd "Intel(R) PRO/10GbE Ethernet driver for the FreeBSD operating system"
-.Sh SYNOPSIS
-To compile this driver into the kernel,
-place the following line in your
-kernel configuration file:
-.Bd -ragged -offset indent
-.Cd "device ixgb"
-.Ed
-.Pp
-Alternatively, to load the driver as a
-module at boot time, place the following line in
-.Xr loader.conf 5 :
-.Bd -literal -offset indent
-if_ixgb_load="YES"
-.Ed
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for PCI Gigabit Ethernet adapters based on
-the Intel 82597EX Ethernet controller chips.
-The driver supports Transmit/Receive checksum offload
-and Jumbo Frames.
-.Pp
-For questions related to hardware requirements,
-refer to the documentation supplied with your Intel PRO/10GbE adapter.
-All hardware requirements listed apply to use with
-.Fx .
-.Pp
-Support for Jumbo Frames is provided via the interface MTU setting.
-Selecting an MTU larger than 1500 bytes with the
-.Xr ifconfig 8
-utility configures the adapter to receive and transmit Jumbo Frames.
-The maximum MTU size for Jumbo Frames is 16114.
-.Pp
-This driver version supports VLANs.
-For information on enabling VLANs, see
-.Xr ifconfig 8 .
-.Sh HARDWARE
-The
-.Nm
-driver supports the following cards:
-.Pp
-.Bl -bullet -compact
-.It
-Intel PRO/10GbE LR Server Adapter
-.It
-Intel PRO/10GbE SR Server Adapter
-.El
-.Sh DIAGNOSTICS
-.Bl -diag
-.It "ixgb%d: Unable to allocate bus resource: memory"
-A fatal initialization error has occurred.
-.It "ixgb%d: Unable to allocate bus resource: interrupt"
-A fatal initialization error has occurred.
-.It "ixgb%d: watchdog timeout -- resetting"
-The device has stopped responding to the network, or there is a problem with
-the network connection (cable).
-.El
-.Sh SUPPORT
-For general information and support,
-go to the Intel support website at:
-.Pa http://support.intel.com .
-.Pp
-If an issue is identified with the released source code on the supported kernel
-with a supported adapter, email the specific information related to the
-issue to
-.Aq Mt freebsd@intel.com .
-.Sh SEE ALSO
-.Xr arp 4 ,
-.Xr em 4 ,
-.Xr netintro 4 ,
-.Xr ng_ether 4 ,
-.Xr polling 4 ,
-.Xr vlan 4 ,
-.Xr ifconfig 8
-.Sh HISTORY
-The
-.Nm
-device driver first appeared in
-.Fx 4.11
-and
-.Fx 5.3 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Intel Corporation Aq Mt freebsd@intel.com .
Index: share/man/man4/polling.4
===================================================================
--- share/man/man4/polling.4
+++ share/man/man4/polling.4
@@ -185,7 +185,6 @@
.Xr fwip 4 ,
.Xr fxp 4 ,
.Xr igb 4 ,
-.Xr ixgb 4 ,
.Xr nfe 4 ,
.Xr nge 4 ,
.Xr re 4 ,
Index: share/man/man4/vlan.4
===================================================================
--- share/man/man4/vlan.4
+++ share/man/man4/vlan.4
@@ -132,7 +132,6 @@
.Xr cxgbe 4 ,
.Xr em 4 ,
.Xr igb 4 ,
-.Xr ixgb 4 ,
.Xr ixgbe 4 ,
.Xr jme 4 ,
.Xr liquidio 4 ,
Index: sys/conf/NOTES
===================================================================
--- sys/conf/NOTES
+++ sys/conf/NOTES
@@ -2124,7 +2124,6 @@
device cxgbev # Chelsio T4-T6 Virtual Functions
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel Pro/1000 Gigabit Ethernet
-device ixgb # Intel Pro/10Gbe PCI-X Ethernet
device ix # Intel Pro/10Gbe PCIE Ethernet
device ixv # Intel Pro/10Gbe PCIE Ethernet VF
device le # AMD Am7900 LANCE and Am79C9xx PCnet
Index: sys/conf/files
===================================================================
--- sys/conf/files
+++ sys/conf/files
@@ -2262,9 +2262,6 @@
compile-with "${NORMAL_FW}" \
no-obj no-implicit-rule \
clean "iwn6050.fw"
-dev/ixgb/if_ixgb.c optional ixgb
-dev/ixgb/ixgb_ee.c optional ixgb
-dev/ixgb/ixgb_hw.c optional ixgb
dev/ixgbe/if_ix.c optional ix inet \
compile-with "${NORMAL_C} -I$S/dev/ixgbe -DSMP"
dev/ixgbe/if_ixv.c optional ixv inet \
Index: sys/dev/ixgb/LICENSE
===================================================================
--- sys/dev/ixgb/LICENSE
+++ sys/dev/ixgb/LICENSE
@@ -1,33 +0,0 @@
-/*$FreeBSD$*/
-/*-
-
-Copyright (c) 2001-2004, Intel Corporation
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-*/
Index: sys/dev/ixgb/README
===================================================================
--- sys/dev/ixgb/README
+++ sys/dev/ixgb/README
@@ -1,237 +0,0 @@
-/*$FreeBSD$*/
-FreeBSD Driver for Intel(R) PRO/10GbE Server Adapters
-=====================================================
-
-March 10, 2004
-
-
-Contents
-========
-
-- Overview
-- Supported Adapters
-- Building and Installation
-- Additional Configurations
-
-
-Overview
-========
-
-This file describes the FreeBSD* driver, version 1.0.x, for the Intel(R)
-PRO/10GbE Family of Adapters. This driver has been developed for use with
-FreeBSD, version 4.8 and later.
-
-For questions related to hardware requirements, refer to the documentation
-supplied with your Intel PRO/10GbE adapter. All hardware requirements listed
-apply to use with FreeBSD.
-
-
-
-Supported Adapters
-==================
-
-The following Intel network adapters are compatible with the drivers in this
-release:
-
- Controller Adapter Name Physical Layer
- ---------- ------------ --------------
-
- 82597EX PRO/10GbE LR/SR Server Adapter 10G Base -LR and -SR
- 850 and 1310 nm optical fiber
-
-
-Building and Installation
-=========================
-
-NOTE: You must have kernel sources installed in order to compile the driver
- module.
-
- In the instructions below, x.x.x is the driver version as indicated in
- the name of the driver tar.
-
-
-1. Move the base driver tar file to the directory of your choice. For
- example, use /home/username/ixgb or /usr/local/src/ixgb.
-
-2. Untar/unzip the archive:
- tar xfz ixgb-x.x.x.tar.gz
-
-3. To install man page:
- cd ixgb-x.x.x
- gzip -c ixgb.4 > /usr/share/man/man4/ixgb.4.gz
-
-4. To load the driver onto a running system:
- cd ixgb-x.x.x/src
- make load
-
-5. To assign an IP address to the interface, enter the following:
- ifconfig ixgb<interface_num> <IP_address>
-
-6. Verify that the interface works. Enter the following, where <IP_address>
- is the IP address for another machine on the same subnet as the interface
- that is being tested:
- ping <IP_address>
-
-7. If you want the driver to load automatically when the system is booted:
-
- cd ixgb-x.x.x/src
- make load
- cp if_ixgb.ko /modules
-
- Edit /boot/loader.conf, and add the following line:
- if_ixgb_load="YES"
-
- OR
-
- compile the driver into the kernel (see item 7).
-
-
- Edit /etc/rc.conf, and create the appropriate ifconfig_ixgb<interface_num>
- entry:
-
- ifconfig_ixgb<interface_num>="<ifconfig_settings>"
-
- Example usage:
-
- ifconfig_ixgb0="inet 192.168.10.1 netmask 255.255.255.0"
-
- NOTE: For assistance, see the ifconfig man page.
-
-8. If you want to compile the driver into the kernel, enter:
-
- cd ixgb-x.x.x/src
-
- mkdir /usr/src/sys/dev/ixgb
-
- cp if_ixgb* /usr/src/sys/dev/ixgb
-
- cp ixgb* /usr/src/sys/dev/ixgb
-
- cp Makefile.kernel /usr/src/sys/modules/ixgb/Makefile
-
- If you have an i386 platform, you will need to edit the files.i386 file.
- This is usually in /usr/src/sys/conf/; actual locations wil vary depending
- on platform. Add the following lines:
-
- dev/ixgb/ixgb_hw.c optional ixgb
- dev/ixgb/ixgb_ee.c optional ixgb
- dev/ixgb/if_ixgb.c optional ixgb
-
-
- Remove the following lines from the files.i386 file, if they exist:
-
- /dev/ixgb/if_ixgb_fx_hw.c optional ixgb
- /dev/ixgb/if_ixgb_phy.c optional ixgb
-
- Edit the kernel configuration file (i.e., GENERIC or MYKERNEL) in
- /usr/src/sys/i386/conf, and ensure the following line is present:
-
- device ixgb
-
- Compile and install the kernel. The system must be reboot for the kernel
- updates to take affect. For additional information on compiling the kernel,
- consult the FreeBSD operating system documentation.
-
-
-
-Additional Configurations
-=========================
-
-The driver supports Transmit/Receive Checksum Offload and Jumbo Frames on
-all PRO/10GbE adapters.
-
- Jumbo Frames
- ------------
- To enable Jumbo Frames, use the ifconfig utility to increase the MTU
- beyond 1500 bytes.
-
- NOTES:
- - Only enable Jumbo Frames if your network infrastructure supports
- them.
-
- - The Jumbo Frames setting on the switch must be set to at least
- 22 bytes larger than that of the adapter.
-
- - There are known performance issues with this driver when running
- UDP traffic with Jumbo Frames.
-
- The Jumbo Frames MTU range for Intel Adapters is 1500 to 16114. The default
- MTU range is 1500. To modify the setting, enter the following:
-
- ifconfig ixgb<interface_num> <hostname or IP address> mtu 9000
-
- To confirm an interface's MTU value, use the ifconfig command. To confirm
- the MTU used between two specific devices, use:
-
- route get <destination_IP_address>
-
- VLANs
- -----
- To create a new VLAN pseudo-interface:
-
- ifconfig <vlan_name> create
-
- To associate the VLAN pseudo-interface with a physical interface and
- assign a VLAN ID, IP address, and netmask:
-
- ifconfig <vlan_name> <ip_address> netmask <subnet_mask> vlan
- <vlan_id> vlandev <physical_interface>
-
- Example:
-
- ifconfig vlan10 10.0.0.1 netmask 255.255.255.0 vlan10 vlandev ixgb0
-
- In this example, all packets will be marked on egress with 802.1Q VLAN
- tags, specifying a VLAN ID of 10.
-
- To remove a VLAN pseudo-interface:
-
- ifconfig <vlan_name> destroy
-
- Polling
- -------
- To enable polling in the driver, add the following options to the kernel
- configuration, and then recompile the kernel:
-
- options DEVICE_POLLING
- options HZ=1000
-
- At runtime, use the following command to turn on polling mode.
-
- ifconfig ixgb0 polling
-
- Similarly, turn off polling mode by removing IFCAP_POLLING flag from
- interface:
-
- ifconfig ixgb0 -polling
-
- The driver has to be built into the kernel for DEVICE POLLING to be
- enabled in the driver.
-
-Support
-=======
-
-For general information and support, go to the Intel support website at:
-
- http://support.intel.com
-
-If an issue is identified with the released source code on the supported
-kernel with a supported adapter, email the specific information related to
-the issue to freebsd@intel.com.
-
-
-
-License
-=======
-
-This software program is released under the terms of a license agreement
-between you ('Licensee') and Intel. Do not use or load this software or any
-associated materials (collectively, the 'Software') until you have carefully
-read the full terms and conditions of the LICENSE located in this software
-package. By loading or using the Software, you agree to the terms of this
-Agreement. If you do not agree with the terms of this Agreement, do not
-install or use the Software.
-
-* Other names and brands may be claimed as the property of others.
-
-
Index: sys/dev/ixgb/if_ixgb.h
===================================================================
--- sys/dev/ixgb/if_ixgb.h
+++ sys/dev/ixgb/if_ixgb.h
@@ -1,384 +0,0 @@
-/*******************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2001-2004, Intel Corporation
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-***************************************************************************/
-/*$FreeBSD$*/
-
-#ifndef _IXGB_H_DEFINED_
-#define _IXGB_H_DEFINED_
-
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-#include <sys/protosw.h>
-#include <sys/socket.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/kernel.h>
-#include <sys/sockio.h>
-
-#include <net/if.h>
-#include <net/if_var.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_types.h>
-
-#include <net/bpf.h>
-#include <net/if_types.h>
-#include <net/if_vlan_var.h>
-
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-#include <netinet/tcp.h>
-#include <netinet/udp.h>
-
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-#if __FreeBSD_version >= 502000
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-#else
-#include <pci/pcivar.h>
-#include <pci/pcireg.h>
-#endif
-#include <sys/proc.h>
-#include <sys/sysctl.h>
-#include <sys/endian.h>
-
-#include <dev/ixgb/ixgb_hw.h>
-#include <dev/ixgb/ixgb_ee.h>
-#include <dev/ixgb/ixgb_ids.h>
-
-/* Tunables */
-
-/*
- * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
- * number of transmit descriptors allocated by the driver. Increasing this
- * value allows the driver to queue more transmits. Each descriptor is 16
- * bytes.
- */
-#define IXGB_MAX_TXD 256
-
-/*
- * RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
- * number of receive descriptors allocated by the driver. Increasing this
- * value allows the driver to buffer more incoming packets. Each descriptor
- * is 16 bytes. A receive buffer is also allocated for each descriptor. The
- * maximum MTU size is 16110.
- *
- */
-#define IXGB_MAX_RXD 1024
-
-/*
- * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value
- * delays the generation of transmit interrupts in units of 1.024
- * microseconds. Transmit interrupt reduction can improve CPU efficiency if
- * properly tuned for specific network traffic. If the system is reporting
- * dropped transmits, this value may be set too high causing the driver to
- * run out of available transmit descriptors.
- */
-#define TIDV 32
-
-/*
- * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value
- * delays the generation of receive interrupts in units of 1.024
- * microseconds. Receive interrupt reduction can improve CPU efficiency if
- * properly tuned for specific network traffic. Increasing this value adds
- * extra latency to frame reception and can end up decreasing the throughput
- * of TCP traffic. If the system is reporting dropped receives, this value
- * may be set too high, causing the driver to run out of available receive
- * descriptors.
- *
- */
-#define RDTR 72
-
-
-/*
- * This parameter controls the maximum no of times the driver will loop in
- * the isr. Minimum Value = 1
- */
-#define IXGB_MAX_INTR 3
-
-
-/*
- * Inform the stack about transmit checksum offload capabilities.
- */
-#define IXGB_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
-
-/*
- * This parameter controls the duration of transmit watchdog timer.
- */
-#define IXGB_TX_TIMEOUT 5 /* set to 5 seconds */
-
-/*
- * This parameter controls when the driver calls the routine to reclaim
- * transmit descriptors.
- */
-#define IXGB_TX_CLEANUP_THRESHOLD IXGB_MAX_TXD / 8
-
-/*
- * Flow Control Types.
- * 1. ixgb_fc_none - Flow Control Disabled
- * 2. ixgb_fc_rx_pause - Flow Control Receive Only
- * 3. ixgb_fc_tx_pause - Flow Control Transmit Only
- * 4. ixgb_fc_full - Flow Control Enabled
- */
-#define FLOW_CONTROL_NONE ixgb_fc_none
-#define FLOW_CONTROL_RX_PAUSE ixgb_fc_rx_pause
-#define FLOW_CONTROL_TX_PAUSE ixgb_fc_tx_pause
-#define FLOW_CONTROL_FULL ixgb_fc_full
-
-/*
- * Set the flow control type. Assign one of the above flow control types to be enabled.
- * Default Value: FLOW_CONTROL_FULL
- */
-#define FLOW_CONTROL FLOW_CONTROL_FULL
-
-/*
- * Receive Flow control low threshold (when we send a resume frame) (FCRTL)
- * Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be
- * less than high threshold by at least 8 bytes Default Value: 163,840
- * (0x28000)
- */
-#define FCRTL 0x28000
-
-/*
- * Receive Flow control high threshold (when we send a pause frame) (FCRTH)
- * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default
- * Value: 196,608 (0x30000)
- */
-#define FCRTH 0x30000
-
-/*
- * Flow control request timeout (how long to pause the link partner's tx)
- * (PAP 15:0) Valid Range: 1 - 65535 Default Value: 256 (0x100)
- */
-#define FCPAUSE 0x100
-
-/* Tunables -- End */
-
-
-#define IXGB_VENDOR_ID 0x8086
-#define IXGB_MMBA 0x0010 /* Mem base address */
-#define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
-
-#define IOCTL_CMD_TYPE u_long
-#define MAX_NUM_MULTICAST_ADDRESSES 128
-#define PCI_ANY_ID (~0U)
-#define ETHER_ALIGN 2
-
-/* Defines for printing debug information */
-#define DEBUG_INIT 0
-#define DEBUG_IOCTL 0
-#define DEBUG_HW 0
-#define _SV_ 0
-
-#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
-#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
-#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
-#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
-#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
-#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
-#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
-#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
-#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
-
-
-/* Supported RX Buffer Sizes */
-#define IXGB_RXBUFFER_2048 2048
-#define IXGB_RXBUFFER_4096 4096
-#define IXGB_RXBUFFER_8192 8192
-#define IXGB_RXBUFFER_16384 16384
-
-#define IXGB_MAX_SCATTER 100
-
-/*
- * ******************************************************************************
- * vendor_info_array
- *
- * This array contains the list of Subvendor/Subdevice IDs on which the driver
- * should load.
- *
-*****************************************************************************
- */
-typedef struct _ixgb_vendor_info_t {
- unsigned int vendor_id;
- unsigned int device_id;
- unsigned int subvendor_id;
- unsigned int subdevice_id;
- unsigned int index;
-} ixgb_vendor_info_t;
-
-
-struct ixgb_buffer {
- struct mbuf *m_head;
- bus_dmamap_t map; /* bus_dma map for packet */
-};
-
-/*
- * Bus dma allocation structure used by ixgb_dma_malloc and ixgb_dma_free.
- */
-struct ixgb_dma_alloc {
- bus_addr_t dma_paddr;
- caddr_t dma_vaddr;
- bus_dma_tag_t dma_tag;
- bus_dmamap_t dma_map;
- bus_dma_segment_t dma_seg;
- bus_size_t dma_size;
- int dma_nseg;
-};
-
-typedef enum _XSUM_CONTEXT_T {
- OFFLOAD_NONE,
- OFFLOAD_TCP_IP,
- OFFLOAD_UDP_IP
-} XSUM_CONTEXT_T;
-
-/* Our adapter structure */
-struct adapter {
- struct ifnet *ifp;
- struct adapter *next;
- struct adapter *prev;
- struct ixgb_hw hw;
-
- /* FreeBSD operating-system-specific structures */
- struct ixgb_osdep osdep;
- device_t dev;
- struct resource *res_memory;
- struct resource *res_ioport;
- struct resource *res_interrupt;
- void *int_handler_tag;
- struct ifmedia media;
- struct callout timer;
- int io_rid;
- int tx_timer;
- struct mtx mtx;
-
- /* Info about the board itself */
- u_int32_t part_num;
- u_int8_t link_active;
- u_int16_t link_speed;
- u_int16_t link_duplex;
- u_int32_t tx_int_delay;
- u_int32_t tx_abs_int_delay;
- u_int32_t rx_int_delay;
- u_int32_t rx_abs_int_delay;
-
- int raidc;
-
- XSUM_CONTEXT_T active_checksum_context;
-
- /*
- * Transmit definitions
- *
- * We have an array of num_tx_desc descriptors (handled by the
- * controller) paired with an array of tx_buffers (at
- * tx_buffer_area). The index of the next available descriptor is
- * next_avail_tx_desc. The number of remaining tx_desc is
- * num_tx_desc_avail.
- */
- struct ixgb_dma_alloc txdma; /* bus_dma glue for tx desc */
- struct ixgb_tx_desc *tx_desc_base;
- u_int32_t next_avail_tx_desc;
- u_int32_t oldest_used_tx_desc;
- volatile u_int16_t num_tx_desc_avail;
- u_int16_t num_tx_desc;
- u_int32_t txd_cmd;
- struct ixgb_buffer *tx_buffer_area;
- bus_dma_tag_t txtag; /* dma tag for tx */
-
- /*
- * Receive definitions
- *
- * we have an array of num_rx_desc rx_desc (handled by the controller),
- * and paired with an array of rx_buffers (at rx_buffer_area). The
- * next pair to check on receive is at offset next_rx_desc_to_check
- */
- struct ixgb_dma_alloc rxdma; /* bus_dma glue for rx desc */
- struct ixgb_rx_desc *rx_desc_base;
- u_int32_t next_rx_desc_to_check;
- u_int16_t num_rx_desc;
- u_int32_t rx_buffer_len;
- struct ixgb_buffer *rx_buffer_area;
- bus_dma_tag_t rxtag; /* dma tag for Rx */
- u_int32_t next_rx_desc_to_use;
-
-
- /* Jumbo frame */
- struct mbuf *fmp;
- struct mbuf *lmp;
-
- struct sysctl_ctx_list sysctl_ctx;
- struct sysctl_oid *sysctl_tree;
-
- /* Multicast array memory */
- u_int8_t *mta;
- /* Misc stats maintained by the driver */
- unsigned long dropped_pkts;
- unsigned long mbuf_alloc_failed;
- unsigned long mbuf_cluster_failed;
- unsigned long no_tx_desc_avail1;
- unsigned long no_tx_desc_avail2;
- unsigned long no_tx_map_avail;
- unsigned long no_tx_dma_setup;
-
- boolean_t in_detach;
-
- /* Board specific private data */
-#ifdef _SV_
- struct ixgb_sv_stats {
- uint64_t icr_rxdmt0;
- uint64_t icr_rxo;
- uint64_t icr_rxt0;
- uint64_t icr_TXDW;
- } sv_stats;
- unsigned long no_pkts_avail;
- unsigned long clean_tx_interrupts;
-#endif
-
- struct ixgb_hw_stats stats;
-};
-
-#define IXGB_LOCK_INIT(_sc, _name) \
- mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
-#define IXGB_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx)
-#define IXGB_LOCK(_sc) mtx_lock(&(_sc)->mtx)
-#define IXGB_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
-#define IXGB_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
-
-#endif /* _IXGB_H_DEFINED_ */
Index: sys/dev/ixgb/if_ixgb.c
===================================================================
--- sys/dev/ixgb/if_ixgb.c
+++ sys/dev/ixgb/if_ixgb.c
@@ -1,2533 +0,0 @@
-/*******************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2001-2004, Intel Corporation
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-***************************************************************************/
-
-/*$FreeBSD$*/
-
-#ifdef HAVE_KERNEL_OPTION_HEADERS
-#include "opt_device_polling.h"
-#endif
-
-#include <dev/ixgb/if_ixgb.h>
-
-/*********************************************************************
- * Set this to one to display debug statistics
- *********************************************************************/
-int ixgb_display_debug_stats = 0;
-
-/*********************************************************************
- * Linked list of board private structures for all NICs found
- *********************************************************************/
-
-struct adapter *ixgb_adapter_list = NULL;
-
-
-
-/*********************************************************************
- * Driver version
- *********************************************************************/
-
-char ixgb_driver_version[] = "1.0.6";
-char ixgb_copyright[] = "Copyright (c) 2001-2004 Intel Corporation.";
-
-/*********************************************************************
- * PCI Device ID Table
- *
- * Used by probe to select devices to load on
- * Last field stores an index into ixgb_strings
- * Last entry must be all 0s
- *
- * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
- *********************************************************************/
-
-static ixgb_vendor_info_t ixgb_vendor_info_array[] =
-{
- /* Intel(R) PRO/10000 Network Connection */
- {IXGB_VENDOR_ID, IXGB_DEVICE_ID_82597EX, PCI_ANY_ID, PCI_ANY_ID, 0},
- {IXGB_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR, PCI_ANY_ID, PCI_ANY_ID, 0},
- /* required last entry */
- {0, 0, 0, 0, 0}
-};
-
-/*********************************************************************
- * Table of branding strings for all supported NICs.
- *********************************************************************/
-
-static char *ixgb_strings[] = {
- "Intel(R) PRO/10GbE Network Driver"
-};
-
-/*********************************************************************
- * Function prototypes
- *********************************************************************/
-static int ixgb_probe(device_t);
-static int ixgb_attach(device_t);
-static int ixgb_detach(device_t);
-static int ixgb_shutdown(device_t);
-static void ixgb_intr(void *);
-static void ixgb_start(struct ifnet *);
-static void ixgb_start_locked(struct ifnet *);
-static int ixgb_ioctl(struct ifnet *, IOCTL_CMD_TYPE, caddr_t);
-static uint64_t ixgb_get_counter(struct ifnet *, ift_counter);
-static void ixgb_watchdog(struct adapter *);
-static void ixgb_init(void *);
-static void ixgb_init_locked(struct adapter *);
-static void ixgb_stop(void *);
-static void ixgb_media_status(struct ifnet *, struct ifmediareq *);
-static int ixgb_media_change(struct ifnet *);
-static void ixgb_identify_hardware(struct adapter *);
-static int ixgb_allocate_pci_resources(struct adapter *);
-static void ixgb_free_pci_resources(struct adapter *);
-static void ixgb_local_timer(void *);
-static int ixgb_hardware_init(struct adapter *);
-static int ixgb_setup_interface(device_t, struct adapter *);
-static int ixgb_setup_transmit_structures(struct adapter *);
-static void ixgb_initialize_transmit_unit(struct adapter *);
-static int ixgb_setup_receive_structures(struct adapter *);
-static void ixgb_initialize_receive_unit(struct adapter *);
-static void ixgb_enable_intr(struct adapter *);
-static void ixgb_disable_intr(struct adapter *);
-static void ixgb_free_transmit_structures(struct adapter *);
-static void ixgb_free_receive_structures(struct adapter *);
-static void ixgb_update_stats_counters(struct adapter *);
-static void ixgb_clean_transmit_interrupts(struct adapter *);
-static int ixgb_allocate_receive_structures(struct adapter *);
-static int ixgb_allocate_transmit_structures(struct adapter *);
-static int ixgb_process_receive_interrupts(struct adapter *, int);
-static void
-ixgb_receive_checksum(struct adapter *,
- struct ixgb_rx_desc * rx_desc,
- struct mbuf *);
-static void
-ixgb_transmit_checksum_setup(struct adapter *,
- struct mbuf *,
- u_int8_t *);
-static void ixgb_set_promisc(struct adapter *);
-static void ixgb_disable_promisc(struct adapter *);
-static void ixgb_set_multi(struct adapter *);
-static void ixgb_print_hw_stats(struct adapter *);
-static void ixgb_print_link_status(struct adapter *);
-static int
-ixgb_get_buf(int i, struct adapter *,
- struct mbuf *);
-static void ixgb_enable_vlans(struct adapter * adapter);
-static int ixgb_encap(struct adapter * adapter, struct mbuf * m_head);
-static int ixgb_sysctl_stats(SYSCTL_HANDLER_ARGS);
-static int
-ixgb_dma_malloc(struct adapter *, bus_size_t,
- struct ixgb_dma_alloc *, int);
-static void ixgb_dma_free(struct adapter *, struct ixgb_dma_alloc *);
-#ifdef DEVICE_POLLING
-static poll_handler_t ixgb_poll;
-#endif
-
-/*********************************************************************
- * FreeBSD Device Interface Entry Points
- *********************************************************************/
-
-static device_method_t ixgb_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, ixgb_probe),
- DEVMETHOD(device_attach, ixgb_attach),
- DEVMETHOD(device_detach, ixgb_detach),
- DEVMETHOD(device_shutdown, ixgb_shutdown),
-
- DEVMETHOD_END
-};
-
-static driver_t ixgb_driver = {
- "ixgb", ixgb_methods, sizeof(struct adapter),
-};
-
-static devclass_t ixgb_devclass;
-DRIVER_MODULE(ixgb, pci, ixgb_driver, ixgb_devclass, 0, 0);
-
-MODULE_DEPEND(ixgb, pci, 1, 1, 1);
-MODULE_DEPEND(ixgb, ether, 1, 1, 1);
-
-/* some defines for controlling descriptor fetches in h/w */
-#define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */
-#define RXDCTL_HTHRESH_DEFAULT 16 /* chip will only prefetch if tail is
- * pushed this many descriptors from
- * head */
-#define RXDCTL_WTHRESH_DEFAULT 0 /* chip writes back at this many or RXT0 */
-
-
-/*********************************************************************
- * Device identification routine
- *
- * ixgb_probe determines if the driver should be loaded on
- * adapter based on PCI vendor/device id of the adapter.
- *
- * return 0 on success, positive on failure
- *********************************************************************/
-
-static int
-ixgb_probe(device_t dev)
-{
- ixgb_vendor_info_t *ent;
-
- u_int16_t pci_vendor_id = 0;
- u_int16_t pci_device_id = 0;
- u_int16_t pci_subvendor_id = 0;
- u_int16_t pci_subdevice_id = 0;
- char adapter_name[60];
-
- INIT_DEBUGOUT("ixgb_probe: begin");
-
- pci_vendor_id = pci_get_vendor(dev);
- if (pci_vendor_id != IXGB_VENDOR_ID)
- return (ENXIO);
-
- pci_device_id = pci_get_device(dev);
- pci_subvendor_id = pci_get_subvendor(dev);
- pci_subdevice_id = pci_get_subdevice(dev);
-
- ent = ixgb_vendor_info_array;
- while (ent->vendor_id != 0) {
- if ((pci_vendor_id == ent->vendor_id) &&
- (pci_device_id == ent->device_id) &&
-
- ((pci_subvendor_id == ent->subvendor_id) ||
- (ent->subvendor_id == PCI_ANY_ID)) &&
-
- ((pci_subdevice_id == ent->subdevice_id) ||
- (ent->subdevice_id == PCI_ANY_ID))) {
- sprintf(adapter_name, "%s, Version - %s",
- ixgb_strings[ent->index],
- ixgb_driver_version);
- device_set_desc_copy(dev, adapter_name);
- return (BUS_PROBE_DEFAULT);
- }
- ent++;
- }
-
- return (ENXIO);
-}
-
-/*********************************************************************
- * Device initialization routine
- *
- * The attach entry point is called when the driver is being loaded.
- * This routine identifies the type of hardware, allocates all resources
- * and initializes the hardware.
- *
- * return 0 on success, positive on failure
- *********************************************************************/
-
-static int
-ixgb_attach(device_t dev)
-{
- struct adapter *adapter;
- int tsize, rsize;
- int error = 0;
-
- device_printf(dev, "%s\n", ixgb_copyright);
- INIT_DEBUGOUT("ixgb_attach: begin");
-
- /* Allocate, clear, and link in our adapter structure */
- if (!(adapter = device_get_softc(dev))) {
- device_printf(dev, "adapter structure allocation failed\n");
- return (ENOMEM);
- }
- bzero(adapter, sizeof(struct adapter));
- adapter->dev = dev;
- adapter->osdep.dev = dev;
- IXGB_LOCK_INIT(adapter, device_get_nameunit(dev));
-
- if (ixgb_adapter_list != NULL)
- ixgb_adapter_list->prev = adapter;
- adapter->next = ixgb_adapter_list;
- ixgb_adapter_list = adapter;
-
- /* SYSCTL APIs */
- SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
- SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
- OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW,
- (void *)adapter, 0,
- ixgb_sysctl_stats, "I", "Statistics");
-
- callout_init_mtx(&adapter->timer, &adapter->mtx, 0);
-
- /* Determine hardware revision */
- ixgb_identify_hardware(adapter);
-
- /* Parameters (to be read from user) */
- adapter->num_tx_desc = IXGB_MAX_TXD;
- adapter->num_rx_desc = IXGB_MAX_RXD;
- adapter->tx_int_delay = TIDV;
- adapter->rx_int_delay = RDTR;
- adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
-
- adapter->hw.fc.high_water = FCRTH;
- adapter->hw.fc.low_water = FCRTL;
- adapter->hw.fc.pause_time = FCPAUSE;
- adapter->hw.fc.send_xon = TRUE;
- adapter->hw.fc.type = FLOW_CONTROL;
-
-
- /* Set the max frame size assuming standard ethernet sized frames */
- adapter->hw.max_frame_size =
- ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
-
- if (ixgb_allocate_pci_resources(adapter)) {
- device_printf(dev, "Allocation of PCI resources failed\n");
- error = ENXIO;
- goto err_pci;
- }
- tsize = IXGB_ROUNDUP(adapter->num_tx_desc *
- sizeof(struct ixgb_tx_desc), 4096);
-
- /* Allocate Transmit Descriptor ring */
- if (ixgb_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_NOWAIT)) {
- device_printf(dev, "Unable to allocate TxDescriptor memory\n");
- error = ENOMEM;
- goto err_tx_desc;
- }
- adapter->tx_desc_base = (struct ixgb_tx_desc *) adapter->txdma.dma_vaddr;
-
- rsize = IXGB_ROUNDUP(adapter->num_rx_desc *
- sizeof(struct ixgb_rx_desc), 4096);
-
- /* Allocate Receive Descriptor ring */
- if (ixgb_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_NOWAIT)) {
- device_printf(dev, "Unable to allocate rx_desc memory\n");
- error = ENOMEM;
- goto err_rx_desc;
- }
- adapter->rx_desc_base = (struct ixgb_rx_desc *) adapter->rxdma.dma_vaddr;
-
- /* Allocate multicast array memory. */
- adapter->mta = malloc(sizeof(u_int8_t) * IXGB_ETH_LENGTH_OF_ADDRESS *
- MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT);
- if (adapter->mta == NULL) {
- device_printf(dev, "Can not allocate multicast setup array\n");
- error = ENOMEM;
- goto err_hw_init;
- }
-
- /* Initialize the hardware */
- if (ixgb_hardware_init(adapter)) {
- device_printf(dev, "Unable to initialize the hardware\n");
- error = EIO;
- goto err_hw_init;
- }
- /* Setup OS specific network interface */
- if (ixgb_setup_interface(dev, adapter) != 0)
- goto err_hw_init;
-
- /* Initialize statistics */
- ixgb_clear_hw_cntrs(&adapter->hw);
- ixgb_update_stats_counters(adapter);
-
- INIT_DEBUGOUT("ixgb_attach: end");
- return (0);
-
-err_hw_init:
- ixgb_dma_free(adapter, &adapter->rxdma);
-err_rx_desc:
- ixgb_dma_free(adapter, &adapter->txdma);
-err_tx_desc:
-err_pci:
- if (adapter->ifp != NULL)
- if_free(adapter->ifp);
- ixgb_free_pci_resources(adapter);
- sysctl_ctx_free(&adapter->sysctl_ctx);
- free(adapter->mta, M_DEVBUF);
- return (error);
-
-}
-
-/*********************************************************************
- * Device removal routine
- *
- * The detach entry point is called when the driver is being removed.
- * This routine stops the adapter and deallocates all the resources
- * that were allocated for driver operation.
- *
- * return 0 on success, positive on failure
- *********************************************************************/
-
-static int
-ixgb_detach(device_t dev)
-{
- struct adapter *adapter = device_get_softc(dev);
- struct ifnet *ifp = adapter->ifp;
-
- INIT_DEBUGOUT("ixgb_detach: begin");
-
-#ifdef DEVICE_POLLING
- if (ifp->if_capenable & IFCAP_POLLING)
- ether_poll_deregister(ifp);
-#endif
-
- IXGB_LOCK(adapter);
- adapter->in_detach = 1;
-
- ixgb_stop(adapter);
- IXGB_UNLOCK(adapter);
-
-#if __FreeBSD_version < 500000
- ether_ifdetach(ifp, ETHER_BPF_SUPPORTED);
-#else
- ether_ifdetach(ifp);
-#endif
- callout_drain(&adapter->timer);
- ixgb_free_pci_resources(adapter);
-#if __FreeBSD_version >= 500000
- if_free(ifp);
-#endif
-
- /* Free Transmit Descriptor ring */
- if (adapter->tx_desc_base) {
- ixgb_dma_free(adapter, &adapter->txdma);
- adapter->tx_desc_base = NULL;
- }
- /* Free Receive Descriptor ring */
- if (adapter->rx_desc_base) {
- ixgb_dma_free(adapter, &adapter->rxdma);
- adapter->rx_desc_base = NULL;
- }
- /* Remove from the adapter list */
- if (ixgb_adapter_list == adapter)
- ixgb_adapter_list = adapter->next;
- if (adapter->next != NULL)
- adapter->next->prev = adapter->prev;
- if (adapter->prev != NULL)
- adapter->prev->next = adapter->next;
- free(adapter->mta, M_DEVBUF);
-
- IXGB_LOCK_DESTROY(adapter);
- return (0);
-}
-
-/*********************************************************************
- *
- * Shutdown entry point
- *
- **********************************************************************/
-
-static int
-ixgb_shutdown(device_t dev)
-{
- struct adapter *adapter = device_get_softc(dev);
- IXGB_LOCK(adapter);
- ixgb_stop(adapter);
- IXGB_UNLOCK(adapter);
- return (0);
-}
-
-
-/*********************************************************************
- * Transmit entry point
- *
- * ixgb_start is called by the stack to initiate a transmit.
- * The driver will remain in this routine as long as there are
- * packets to transmit and transmit resources are available.
- * In case resources are not available stack is notified and
- * the packet is requeued.
- **********************************************************************/
-
-static void
-ixgb_start_locked(struct ifnet * ifp)
-{
- struct mbuf *m_head;
- struct adapter *adapter = ifp->if_softc;
-
- IXGB_LOCK_ASSERT(adapter);
-
- if (!adapter->link_active)
- return;
-
- while (ifp->if_snd.ifq_head != NULL) {
- IF_DEQUEUE(&ifp->if_snd, m_head);
-
- if (m_head == NULL)
- break;
-
- if (ixgb_encap(adapter, m_head)) {
- ifp->if_drv_flags |= IFF_DRV_OACTIVE;
- IF_PREPEND(&ifp->if_snd, m_head);
- break;
- }
- /* Send a copy of the frame to the BPF listener */
-#if __FreeBSD_version < 500000
- if (ifp->if_bpf)
- bpf_mtap(ifp, m_head);
-#else
- ETHER_BPF_MTAP(ifp, m_head);
-#endif
- /* Set timeout in case hardware has problems transmitting */
- adapter->tx_timer = IXGB_TX_TIMEOUT;
-
- }
- return;
-}
-
-static void
-ixgb_start(struct ifnet *ifp)
-{
- struct adapter *adapter = ifp->if_softc;
-
- IXGB_LOCK(adapter);
- ixgb_start_locked(ifp);
- IXGB_UNLOCK(adapter);
- return;
-}
-
-/*********************************************************************
- * Ioctl entry point
- *
- * ixgb_ioctl is called when the user wants to configure the
- * interface.
- *
- * return 0 on success, positive on failure
- **********************************************************************/
-
-static int
-ixgb_ioctl(struct ifnet * ifp, IOCTL_CMD_TYPE command, caddr_t data)
-{
- int mask, error = 0;
- struct ifreq *ifr = (struct ifreq *) data;
- struct adapter *adapter = ifp->if_softc;
-
- if (adapter->in_detach)
- goto out;
-
- switch (command) {
- case SIOCSIFMTU:
- IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
- if (ifr->ifr_mtu > IXGB_MAX_JUMBO_FRAME_SIZE - ETHER_HDR_LEN) {
- error = EINVAL;
- } else {
- IXGB_LOCK(adapter);
- ifp->if_mtu = ifr->ifr_mtu;
- adapter->hw.max_frame_size =
- ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
-
- if (ifp->if_drv_flags & IFF_DRV_RUNNING)
- ixgb_init_locked(adapter);
- IXGB_UNLOCK(adapter);
- }
- break;
- case SIOCSIFFLAGS:
- IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)");
- IXGB_LOCK(adapter);
- if (ifp->if_flags & IFF_UP) {
- if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
- ixgb_init_locked(adapter);
- }
- ixgb_disable_promisc(adapter);
- ixgb_set_promisc(adapter);
- } else {
- if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
- ixgb_stop(adapter);
- }
- }
- IXGB_UNLOCK(adapter);
- break;
- case SIOCADDMULTI:
- case SIOCDELMULTI:
- IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
- if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
- IXGB_LOCK(adapter);
- ixgb_disable_intr(adapter);
- ixgb_set_multi(adapter);
- ixgb_enable_intr(adapter);
- IXGB_UNLOCK(adapter);
- }
- break;
- case SIOCSIFMEDIA:
- case SIOCGIFMEDIA:
- IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)");
- error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
- break;
- case SIOCSIFCAP:
- IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
- mask = ifr->ifr_reqcap ^ ifp->if_capenable;
-#ifdef DEVICE_POLLING
- if (mask & IFCAP_POLLING) {
- if (ifr->ifr_reqcap & IFCAP_POLLING) {
- error = ether_poll_register(ixgb_poll, ifp);
- if (error)
- return(error);
- IXGB_LOCK(adapter);
- ixgb_disable_intr(adapter);
- ifp->if_capenable |= IFCAP_POLLING;
- IXGB_UNLOCK(adapter);
- } else {
- error = ether_poll_deregister(ifp);
- /* Enable interrupt even in error case */
- IXGB_LOCK(adapter);
- ixgb_enable_intr(adapter);
- ifp->if_capenable &= ~IFCAP_POLLING;
- IXGB_UNLOCK(adapter);
- }
- }
-#endif /* DEVICE_POLLING */
- if (mask & IFCAP_HWCSUM) {
- if (IFCAP_HWCSUM & ifp->if_capenable)
- ifp->if_capenable &= ~IFCAP_HWCSUM;
- else
- ifp->if_capenable |= IFCAP_HWCSUM;
- if (ifp->if_drv_flags & IFF_DRV_RUNNING)
- ixgb_init(adapter);
- }
- break;
- default:
- error = ether_ioctl(ifp, command, data);
- break;
- }
-
-out:
- return (error);
-}
-
-/*********************************************************************
- * Watchdog entry point
- *
- * This routine is called whenever hardware quits transmitting.
- *
- **********************************************************************/
-
-static void
-ixgb_watchdog(struct adapter *adapter)
-{
- struct ifnet *ifp;
-
- ifp = adapter->ifp;
-
- /*
- * If we are in this routine because of pause frames, then don't
- * reset the hardware.
- */
- if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_TXOFF) {
- adapter->tx_timer = IXGB_TX_TIMEOUT;
- return;
- }
- if_printf(ifp, "watchdog timeout -- resetting\n");
-
- ixgb_stop(adapter);
- ixgb_init_locked(adapter);
-
-
- if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
-
- return;
-}
-
-/*********************************************************************
- * Init entry point
- *
- * This routine is used in two ways. It is used by the stack as
- * init entry point in network interface structure. It is also used
- * by the driver as a hw/sw initialization routine to get to a
- * consistent state.
- *
- * return 0 on success, positive on failure
- **********************************************************************/
-
-static void
-ixgb_init_locked(struct adapter *adapter)
-{
- struct ifnet *ifp;
-
- INIT_DEBUGOUT("ixgb_init: begin");
-
- IXGB_LOCK_ASSERT(adapter);
-
- ixgb_stop(adapter);
- ifp = adapter->ifp;
-
- /* Get the latest mac address, User can use a LAA */
- bcopy(IF_LLADDR(ifp), adapter->hw.curr_mac_addr,
- IXGB_ETH_LENGTH_OF_ADDRESS);
-
- /* Initialize the hardware */
- if (ixgb_hardware_init(adapter)) {
- if_printf(ifp, "Unable to initialize the hardware\n");
- return;
- }
- ixgb_enable_vlans(adapter);
-
- /* Prepare transmit descriptors and buffers */
- if (ixgb_setup_transmit_structures(adapter)) {
- if_printf(ifp, "Could not setup transmit structures\n");
- ixgb_stop(adapter);
- return;
- }
- ixgb_initialize_transmit_unit(adapter);
-
- /* Setup Multicast table */
- ixgb_set_multi(adapter);
-
- /* Prepare receive descriptors and buffers */
- if (ixgb_setup_receive_structures(adapter)) {
- if_printf(ifp, "Could not setup receive structures\n");
- ixgb_stop(adapter);
- return;
- }
- ixgb_initialize_receive_unit(adapter);
-
- /* Don't lose promiscuous settings */
- ixgb_set_promisc(adapter);
-
- ifp = adapter->ifp;
- ifp->if_drv_flags |= IFF_DRV_RUNNING;
- ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-
- if (ifp->if_capenable & IFCAP_TXCSUM)
- ifp->if_hwassist = IXGB_CHECKSUM_FEATURES;
- else
- ifp->if_hwassist = 0;
-
-
- /* Enable jumbo frames */
- if (ifp->if_mtu > ETHERMTU) {
- uint32_t temp_reg;
- IXGB_WRITE_REG(&adapter->hw, MFS,
- adapter->hw.max_frame_size << IXGB_MFS_SHIFT);
- temp_reg = IXGB_READ_REG(&adapter->hw, CTRL0);
- temp_reg |= IXGB_CTRL0_JFE;
- IXGB_WRITE_REG(&adapter->hw, CTRL0, temp_reg);
- }
- callout_reset(&adapter->timer, hz, ixgb_local_timer, adapter);
- ixgb_clear_hw_cntrs(&adapter->hw);
-#ifdef DEVICE_POLLING
- /*
- * Only disable interrupts if we are polling, make sure they are on
- * otherwise.
- */
- if (ifp->if_capenable & IFCAP_POLLING)
- ixgb_disable_intr(adapter);
- else
-#endif
- ixgb_enable_intr(adapter);
-
- return;
-}
-
-static void
-ixgb_init(void *arg)
-{
- struct adapter *adapter = arg;
-
- IXGB_LOCK(adapter);
- ixgb_init_locked(adapter);
- IXGB_UNLOCK(adapter);
- return;
-}
-
-#ifdef DEVICE_POLLING
-static int
-ixgb_poll_locked(struct ifnet * ifp, enum poll_cmd cmd, int count)
-{
- struct adapter *adapter = ifp->if_softc;
- u_int32_t reg_icr;
- int rx_npkts;
-
- IXGB_LOCK_ASSERT(adapter);
-
- if (cmd == POLL_AND_CHECK_STATUS) {
- reg_icr = IXGB_READ_REG(&adapter->hw, ICR);
- if (reg_icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)) {
- ixgb_check_for_link(&adapter->hw);
- ixgb_print_link_status(adapter);
- }
- }
- rx_npkts = ixgb_process_receive_interrupts(adapter, count);
- ixgb_clean_transmit_interrupts(adapter);
-
- if (ifp->if_snd.ifq_head != NULL)
- ixgb_start_locked(ifp);
- return (rx_npkts);
-}
-
-static int
-ixgb_poll(struct ifnet * ifp, enum poll_cmd cmd, int count)
-{
- struct adapter *adapter = ifp->if_softc;
- int rx_npkts = 0;
-
- IXGB_LOCK(adapter);
- if (ifp->if_drv_flags & IFF_DRV_RUNNING)
- rx_npkts = ixgb_poll_locked(ifp, cmd, count);
- IXGB_UNLOCK(adapter);
- return (rx_npkts);
-}
-#endif /* DEVICE_POLLING */
-
-/*********************************************************************
- *
- * Interrupt Service routine
- *
- **********************************************************************/
-
-static void
-ixgb_intr(void *arg)
-{
- u_int32_t loop_cnt = IXGB_MAX_INTR;
- u_int32_t reg_icr;
- struct ifnet *ifp;
- struct adapter *adapter = arg;
- boolean_t rxdmt0 = FALSE;
-
- IXGB_LOCK(adapter);
-
- ifp = adapter->ifp;
-
-#ifdef DEVICE_POLLING
- if (ifp->if_capenable & IFCAP_POLLING) {
- IXGB_UNLOCK(adapter);
- return;
- }
-#endif
-
- reg_icr = IXGB_READ_REG(&adapter->hw, ICR);
- if (reg_icr == 0) {
- IXGB_UNLOCK(adapter);
- return;
- }
-
- if (reg_icr & IXGB_INT_RXDMT0)
- rxdmt0 = TRUE;
-
-#ifdef _SV_
- if (reg_icr & IXGB_INT_RXDMT0)
- adapter->sv_stats.icr_rxdmt0++;
- if (reg_icr & IXGB_INT_RXO)
- adapter->sv_stats.icr_rxo++;
- if (reg_icr & IXGB_INT_RXT0)
- adapter->sv_stats.icr_rxt0++;
- if (reg_icr & IXGB_INT_TXDW)
- adapter->sv_stats.icr_TXDW++;
-#endif /* _SV_ */
-
- /* Link status change */
- if (reg_icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)) {
- ixgb_check_for_link(&adapter->hw);
- ixgb_print_link_status(adapter);
- }
- while (loop_cnt > 0) {
- if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
- ixgb_process_receive_interrupts(adapter, -1);
- ixgb_clean_transmit_interrupts(adapter);
- }
- loop_cnt--;
- }
-
- if (rxdmt0 && adapter->raidc) {
- IXGB_WRITE_REG(&adapter->hw, IMC, IXGB_INT_RXDMT0);
- IXGB_WRITE_REG(&adapter->hw, IMS, IXGB_INT_RXDMT0);
- }
- if (ifp->if_drv_flags & IFF_DRV_RUNNING && ifp->if_snd.ifq_head != NULL)
- ixgb_start_locked(ifp);
-
- IXGB_UNLOCK(adapter);
- return;
-}
-
-
-/*********************************************************************
- *
- * Media Ioctl callback
- *
- * This routine is called whenever the user queries the status of
- * the interface using ifconfig.
- *
- **********************************************************************/
-static void
-ixgb_media_status(struct ifnet * ifp, struct ifmediareq * ifmr)
-{
- struct adapter *adapter = ifp->if_softc;
-
- INIT_DEBUGOUT("ixgb_media_status: begin");
-
- ixgb_check_for_link(&adapter->hw);
- ixgb_print_link_status(adapter);
-
- ifmr->ifm_status = IFM_AVALID;
- ifmr->ifm_active = IFM_ETHER;
-
- if (!adapter->hw.link_up)
- return;
-
- ifmr->ifm_status |= IFM_ACTIVE;
- ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
-
- return;
-}
-
-/*********************************************************************
- *
- * Media Ioctl callback
- *
- * This routine is called when the user changes speed/duplex using
- * media/mediopt option with ifconfig.
- *
- **********************************************************************/
-static int
-ixgb_media_change(struct ifnet * ifp)
-{
- struct adapter *adapter = ifp->if_softc;
- struct ifmedia *ifm = &adapter->media;
-
- INIT_DEBUGOUT("ixgb_media_change: begin");
-
- if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
- return (EINVAL);
-
- return (0);
-}
-
-/*********************************************************************
- *
- * This routine maps the mbufs to tx descriptors.
- *
- * return 0 on success, positive on failure
- **********************************************************************/
-
-static int
-ixgb_encap(struct adapter * adapter, struct mbuf * m_head)
-{
- u_int8_t txd_popts;
- int i, j, error, nsegs;
-
-#if __FreeBSD_version < 500000
- struct ifvlan *ifv = NULL;
-#endif
- bus_dma_segment_t segs[IXGB_MAX_SCATTER];
- bus_dmamap_t map;
- struct ixgb_buffer *tx_buffer = NULL;
- struct ixgb_tx_desc *current_tx_desc = NULL;
- struct ifnet *ifp = adapter->ifp;
-
- /*
- * Force a cleanup if number of TX descriptors available hits the
- * threshold
- */
- if (adapter->num_tx_desc_avail <= IXGB_TX_CLEANUP_THRESHOLD) {
- ixgb_clean_transmit_interrupts(adapter);
- }
- if (adapter->num_tx_desc_avail <= IXGB_TX_CLEANUP_THRESHOLD) {
- adapter->no_tx_desc_avail1++;
- return (ENOBUFS);
- }
- /*
- * Map the packet for DMA.
- */
- if (bus_dmamap_create(adapter->txtag, BUS_DMA_NOWAIT, &map)) {
- adapter->no_tx_map_avail++;
- return (ENOMEM);
- }
- error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, m_head, segs,
- &nsegs, BUS_DMA_NOWAIT);
- if (error != 0) {
- adapter->no_tx_dma_setup++;
- if_printf(ifp, "ixgb_encap: bus_dmamap_load_mbuf failed; "
- "error %u\n", error);
- bus_dmamap_destroy(adapter->txtag, map);
- return (error);
- }
- KASSERT(nsegs != 0, ("ixgb_encap: empty packet"));
-
- if (nsegs > adapter->num_tx_desc_avail) {
- adapter->no_tx_desc_avail2++;
- bus_dmamap_destroy(adapter->txtag, map);
- return (ENOBUFS);
- }
- if (ifp->if_hwassist > 0) {
- ixgb_transmit_checksum_setup(adapter, m_head,
- &txd_popts);
- } else
- txd_popts = 0;
-
- /* Find out if we are in vlan mode */
-#if __FreeBSD_version < 500000
- if ((m_head->m_flags & (M_PROTO1 | M_PKTHDR)) == (M_PROTO1 | M_PKTHDR) &&
- m_head->m_pkthdr.rcvif != NULL &&
- m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN)
- ifv = m_head->m_pkthdr.rcvif->if_softc;
-#elseif __FreeBSD_version < 700000
- mtag = VLAN_OUTPUT_TAG(ifp, m_head);
-#endif
- i = adapter->next_avail_tx_desc;
- for (j = 0; j < nsegs; j++) {
- tx_buffer = &adapter->tx_buffer_area[i];
- current_tx_desc = &adapter->tx_desc_base[i];
-
- current_tx_desc->buff_addr = htole64(segs[j].ds_addr);
- current_tx_desc->cmd_type_len = (adapter->txd_cmd | segs[j].ds_len);
- current_tx_desc->popts = txd_popts;
- if (++i == adapter->num_tx_desc)
- i = 0;
-
- tx_buffer->m_head = NULL;
- }
-
- adapter->num_tx_desc_avail -= nsegs;
- adapter->next_avail_tx_desc = i;
-
-#if __FreeBSD_version < 500000
- if (ifv != NULL) {
- /* Set the vlan id */
- current_tx_desc->vlan = ifv->ifv_tag;
-#elseif __FreeBSD_version < 700000
- if (mtag != NULL) {
- /* Set the vlan id */
- current_tx_desc->vlan = VLAN_TAG_VALUE(mtag);
-#else
- if (m_head->m_flags & M_VLANTAG) {
- current_tx_desc->vlan = m_head->m_pkthdr.ether_vtag;
-#endif
-
- /* Tell hardware to add tag */
- current_tx_desc->cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
- }
- tx_buffer->m_head = m_head;
- tx_buffer->map = map;
- bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
-
- /*
- * Last Descriptor of Packet needs End Of Packet (EOP)
- */
- current_tx_desc->cmd_type_len |= (IXGB_TX_DESC_CMD_EOP);
-
- /*
- * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000
- * that this frame is available to transmit.
- */
- IXGB_WRITE_REG(&adapter->hw, TDT, i);
-
- return (0);
-}
-
-static void
-ixgb_set_promisc(struct adapter * adapter)
-{
-
- u_int32_t reg_rctl;
- struct ifnet *ifp = adapter->ifp;
-
- reg_rctl = IXGB_READ_REG(&adapter->hw, RCTL);
-
- if (ifp->if_flags & IFF_PROMISC) {
- reg_rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
- IXGB_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
- } else if (ifp->if_flags & IFF_ALLMULTI) {
- reg_rctl |= IXGB_RCTL_MPE;
- reg_rctl &= ~IXGB_RCTL_UPE;
- IXGB_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
- }
- return;
-}
-
-static void
-ixgb_disable_promisc(struct adapter * adapter)
-{
- u_int32_t reg_rctl;
-
- reg_rctl = IXGB_READ_REG(&adapter->hw, RCTL);
-
- reg_rctl &= (~IXGB_RCTL_UPE);
- reg_rctl &= (~IXGB_RCTL_MPE);
- IXGB_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
-
- return;
-}
-
-
-/*********************************************************************
- * Multicast Update
- *
- * This routine is called whenever multicast address list is updated.
- *
- **********************************************************************/
-
-static void
-ixgb_set_multi(struct adapter * adapter)
-{
- u_int32_t reg_rctl = 0;
- u_int8_t *mta;
- struct ifmultiaddr *ifma;
- int mcnt = 0;
- struct ifnet *ifp = adapter->ifp;
-
- IOCTL_DEBUGOUT("ixgb_set_multi: begin");
-
- mta = adapter->mta;
- bzero(mta, sizeof(u_int8_t) * IXGB_ETH_LENGTH_OF_ADDRESS *
- MAX_NUM_MULTICAST_ADDRESSES);
-
- if_maddr_rlock(ifp);
-#if __FreeBSD_version < 500000
- LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
-#else
- TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
-#endif
- if (ifma->ifma_addr->sa_family != AF_LINK)
- continue;
-
- bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr),
- &mta[mcnt * IXGB_ETH_LENGTH_OF_ADDRESS], IXGB_ETH_LENGTH_OF_ADDRESS);
- mcnt++;
- }
- if_maddr_runlock(ifp);
-
- if (mcnt > MAX_NUM_MULTICAST_ADDRESSES) {
- reg_rctl = IXGB_READ_REG(&adapter->hw, RCTL);
- reg_rctl |= IXGB_RCTL_MPE;
- IXGB_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
- } else
- ixgb_mc_addr_list_update(&adapter->hw, mta, mcnt, 0);
-
- return;
-}
-
-
-/*********************************************************************
- * Timer routine
- *
- * This routine checks for link status and updates statistics.
- *
- **********************************************************************/
-
-static void
-ixgb_local_timer(void *arg)
-{
- struct ifnet *ifp;
- struct adapter *adapter = arg;
- ifp = adapter->ifp;
-
- IXGB_LOCK_ASSERT(adapter);
-
- ixgb_check_for_link(&adapter->hw);
- ixgb_print_link_status(adapter);
- ixgb_update_stats_counters(adapter);
- if (ixgb_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING) {
- ixgb_print_hw_stats(adapter);
- }
- if (adapter->tx_timer != 0 && --adapter->tx_timer == 0)
- ixgb_watchdog(adapter);
- callout_reset(&adapter->timer, hz, ixgb_local_timer, adapter);
-}
-
-static void
-ixgb_print_link_status(struct adapter * adapter)
-{
- if (adapter->hw.link_up) {
- if (!adapter->link_active) {
- if_printf(adapter->ifp, "Link is up %d Mbps %s \n",
- 10000,
- "Full Duplex");
- adapter->link_active = 1;
- }
- } else {
- if (adapter->link_active) {
- if_printf(adapter->ifp, "Link is Down \n");
- adapter->link_active = 0;
- }
- }
-
- return;
-}
-
-
-
-/*********************************************************************
- *
- * This routine disables all traffic on the adapter by issuing a
- * global reset on the MAC and deallocates TX/RX buffers.
- *
- **********************************************************************/
-
-static void
-ixgb_stop(void *arg)
-{
- struct ifnet *ifp;
- struct adapter *adapter = arg;
- ifp = adapter->ifp;
-
- IXGB_LOCK_ASSERT(adapter);
-
- INIT_DEBUGOUT("ixgb_stop: begin\n");
- ixgb_disable_intr(adapter);
- adapter->hw.adapter_stopped = FALSE;
- ixgb_adapter_stop(&adapter->hw);
- callout_stop(&adapter->timer);
- ixgb_free_transmit_structures(adapter);
- ixgb_free_receive_structures(adapter);
-
- /* Tell the stack that the interface is no longer active */
- ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
- adapter->tx_timer = 0;
-
- return;
-}
-
-
-/*********************************************************************
- *
- * Determine hardware revision.
- *
- **********************************************************************/
-static void
-ixgb_identify_hardware(struct adapter * adapter)
-{
- device_t dev = adapter->dev;
-
- /* Make sure our PCI config space has the necessary stuff set */
- pci_enable_busmaster(dev);
- adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
-
- /* Save off the information about this board */
- adapter->hw.vendor_id = pci_get_vendor(dev);
- adapter->hw.device_id = pci_get_device(dev);
- adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);
- adapter->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2);
- adapter->hw.subsystem_id = pci_read_config(dev, PCIR_SUBDEV_0, 2);
-
- /* Set MacType, etc. based on this PCI info */
- switch (adapter->hw.device_id) {
- case IXGB_DEVICE_ID_82597EX:
- case IXGB_DEVICE_ID_82597EX_SR:
- adapter->hw.mac_type = ixgb_82597;
- break;
- default:
- INIT_DEBUGOUT1("Unknown device if 0x%x", adapter->hw.device_id);
- device_printf(dev, "unsupported device id 0x%x\n",
- adapter->hw.device_id);
- }
-
- return;
-}
-
-static int
-ixgb_allocate_pci_resources(struct adapter * adapter)
-{
- int rid;
- device_t dev = adapter->dev;
-
- rid = IXGB_MMBA;
- adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
- &rid,
- RF_ACTIVE);
- if (!(adapter->res_memory)) {
- device_printf(dev, "Unable to allocate bus resource: memory\n");
- return (ENXIO);
- }
- adapter->osdep.mem_bus_space_tag =
- rman_get_bustag(adapter->res_memory);
- adapter->osdep.mem_bus_space_handle =
- rman_get_bushandle(adapter->res_memory);
- adapter->hw.hw_addr = (uint8_t *) & adapter->osdep.mem_bus_space_handle;
-
- rid = 0x0;
- adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ,
- &rid,
- RF_SHAREABLE | RF_ACTIVE);
- if (!(adapter->res_interrupt)) {
- device_printf(dev,
- "Unable to allocate bus resource: interrupt\n");
- return (ENXIO);
- }
- if (bus_setup_intr(dev, adapter->res_interrupt,
- INTR_TYPE_NET | INTR_MPSAFE,
- NULL, (void (*) (void *))ixgb_intr, adapter,
- &adapter->int_handler_tag)) {
- device_printf(dev, "Error registering interrupt handler!\n");
- return (ENXIO);
- }
- adapter->hw.back = &adapter->osdep;
-
- return (0);
-}
-
-static void
-ixgb_free_pci_resources(struct adapter * adapter)
-{
- device_t dev = adapter->dev;
-
- if (adapter->res_interrupt != NULL) {
- bus_teardown_intr(dev, adapter->res_interrupt,
- adapter->int_handler_tag);
- bus_release_resource(dev, SYS_RES_IRQ, 0,
- adapter->res_interrupt);
- }
- if (adapter->res_memory != NULL) {
- bus_release_resource(dev, SYS_RES_MEMORY, IXGB_MMBA,
- adapter->res_memory);
- }
- if (adapter->res_ioport != NULL) {
- bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid,
- adapter->res_ioport);
- }
- return;
-}
-
-/*********************************************************************
- *
- * Initialize the hardware to a configuration as specified by the
- * adapter structure. The controller is reset, the EEPROM is
- * verified, the MAC address is set, then the shared initialization
- * routines are called.
- *
- **********************************************************************/
-static int
-ixgb_hardware_init(struct adapter * adapter)
-{
- /* Issue a global reset */
- adapter->hw.adapter_stopped = FALSE;
- ixgb_adapter_stop(&adapter->hw);
-
- /* Make sure we have a good EEPROM before we read from it */
- if (!ixgb_validate_eeprom_checksum(&adapter->hw)) {
- device_printf(adapter->dev,
- "The EEPROM Checksum Is Not Valid\n");
- return (EIO);
- }
- if (!ixgb_init_hw(&adapter->hw)) {
- device_printf(adapter->dev, "Hardware Initialization Failed");
- return (EIO);
- }
-
- return (0);
-}
-
-/*********************************************************************
- *
- * Setup networking device structure and register an interface.
- *
- **********************************************************************/
-static int
-ixgb_setup_interface(device_t dev, struct adapter * adapter)
-{
- struct ifnet *ifp;
- INIT_DEBUGOUT("ixgb_setup_interface: begin");
-
- ifp = adapter->ifp = if_alloc(IFT_ETHER);
- if (ifp == NULL) {
- device_printf(dev, "can not allocate ifnet structure\n");
- return (-1);
- }
-#if __FreeBSD_version >= 502000
- if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-#else
- ifp->if_unit = device_get_unit(dev);
- ifp->if_name = "ixgb";
-#endif
- ifp->if_baudrate = 1000000000;
- ifp->if_init = ixgb_init;
- ifp->if_softc = adapter;
- ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
- ifp->if_ioctl = ixgb_ioctl;
- ifp->if_start = ixgb_start;
- ifp->if_get_counter = ixgb_get_counter;
- ifp->if_snd.ifq_maxlen = adapter->num_tx_desc - 1;
-
-#if __FreeBSD_version < 500000
- ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
-#else
- ether_ifattach(ifp, adapter->hw.curr_mac_addr);
-#endif
-
- ifp->if_capabilities = IFCAP_HWCSUM;
-
- /*
- * Tell the upper layer(s) we support long frames.
- */
- ifp->if_hdrlen = sizeof(struct ether_vlan_header);
-
-#if __FreeBSD_version >= 500000
- ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
-#endif
-
- ifp->if_capenable = ifp->if_capabilities;
-
-#ifdef DEVICE_POLLING
- ifp->if_capabilities |= IFCAP_POLLING;
-#endif
-
- /*
- * Specify the media types supported by this adapter and register
- * callbacks to update media and link information
- */
- ifmedia_init(&adapter->media, IFM_IMASK, ixgb_media_change,
- ixgb_media_status);
- ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX | IFM_FDX,
- 0, NULL);
- ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX,
- 0, NULL);
- ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
- ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
-
- return (0);
-}
-
-/********************************************************************
- * Manage DMA'able memory.
- *******************************************************************/
-static void
-ixgb_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nseg, int error)
-{
- if (error)
- return;
- *(bus_addr_t *) arg = segs->ds_addr;
- return;
-}
-
-static int
-ixgb_dma_malloc(struct adapter * adapter, bus_size_t size,
- struct ixgb_dma_alloc * dma, int mapflags)
-{
- device_t dev;
- int r;
-
- dev = adapter->dev;
- r = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
- PAGE_SIZE, 0, /* alignment, bounds */
- BUS_SPACE_MAXADDR, /* lowaddr */
- BUS_SPACE_MAXADDR, /* highaddr */
- NULL, NULL, /* filter, filterarg */
- size, /* maxsize */
- 1, /* nsegments */
- size, /* maxsegsize */
- BUS_DMA_ALLOCNOW, /* flags */
-#if __FreeBSD_version >= 502000
- NULL, /* lockfunc */
- NULL, /* lockfuncarg */
-#endif
- &dma->dma_tag);
- if (r != 0) {
- device_printf(dev, "ixgb_dma_malloc: bus_dma_tag_create failed; "
- "error %u\n", r);
- goto fail_0;
- }
- r = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
- BUS_DMA_NOWAIT, &dma->dma_map);
- if (r != 0) {
- device_printf(dev, "ixgb_dma_malloc: bus_dmamem_alloc failed; "
- "error %u\n", r);
- goto fail_1;
- }
- r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr,
- size,
- ixgb_dmamap_cb,
- &dma->dma_paddr,
- mapflags | BUS_DMA_NOWAIT);
- if (r != 0) {
- device_printf(dev, "ixgb_dma_malloc: bus_dmamap_load failed; "
- "error %u\n", r);
- goto fail_2;
- }
- dma->dma_size = size;
- return (0);
-fail_2:
- bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
-fail_1:
- bus_dma_tag_destroy(dma->dma_tag);
-fail_0:
- dma->dma_tag = NULL;
- return (r);
-}
-
-
-
-static void
-ixgb_dma_free(struct adapter * adapter, struct ixgb_dma_alloc * dma)
-{
- bus_dmamap_unload(dma->dma_tag, dma->dma_map);
- bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
- bus_dma_tag_destroy(dma->dma_tag);
-}
-
-/*********************************************************************
- *
- * Allocate memory for tx_buffer structures. The tx_buffer stores all
- * the information needed to transmit a packet on the wire.
- *
- **********************************************************************/
-static int
-ixgb_allocate_transmit_structures(struct adapter * adapter)
-{
- if (!(adapter->tx_buffer_area =
- (struct ixgb_buffer *) malloc(sizeof(struct ixgb_buffer) *
- adapter->num_tx_desc, M_DEVBUF,
- M_NOWAIT | M_ZERO))) {
- device_printf(adapter->dev,
- "Unable to allocate tx_buffer memory\n");
- return ENOMEM;
- }
- bzero(adapter->tx_buffer_area,
- sizeof(struct ixgb_buffer) * adapter->num_tx_desc);
-
- return 0;
-}
-
-/*********************************************************************
- *
- * Allocate and initialize transmit structures.
- *
- **********************************************************************/
-static int
-ixgb_setup_transmit_structures(struct adapter * adapter)
-{
- /*
- * Setup DMA descriptor areas.
- */
- if (bus_dma_tag_create(bus_get_dma_tag(adapter->dev), /* parent */
- PAGE_SIZE, 0, /* alignment, bounds */
- BUS_SPACE_MAXADDR, /* lowaddr */
- BUS_SPACE_MAXADDR, /* highaddr */
- NULL, NULL, /* filter, filterarg */
- MCLBYTES * IXGB_MAX_SCATTER, /* maxsize */
- IXGB_MAX_SCATTER, /* nsegments */
- MCLBYTES, /* maxsegsize */
- BUS_DMA_ALLOCNOW, /* flags */
-#if __FreeBSD_version >= 502000
- NULL, /* lockfunc */
- NULL, /* lockfuncarg */
-#endif
- &adapter->txtag)) {
- device_printf(adapter->dev, "Unable to allocate TX DMA tag\n");
- return (ENOMEM);
- }
- if (ixgb_allocate_transmit_structures(adapter))
- return ENOMEM;
-
- bzero((void *)adapter->tx_desc_base,
- (sizeof(struct ixgb_tx_desc)) * adapter->num_tx_desc);
-
- adapter->next_avail_tx_desc = 0;
- adapter->oldest_used_tx_desc = 0;
-
- /* Set number of descriptors available */
- adapter->num_tx_desc_avail = adapter->num_tx_desc;
-
- /* Set checksum context */
- adapter->active_checksum_context = OFFLOAD_NONE;
-
- return 0;
-}
-
-/*********************************************************************
- *
- * Enable transmit unit.
- *
- **********************************************************************/
-static void
-ixgb_initialize_transmit_unit(struct adapter * adapter)
-{
- u_int32_t reg_tctl;
- u_int64_t tdba = adapter->txdma.dma_paddr;
-
- /* Setup the Base and Length of the Tx Descriptor Ring */
- IXGB_WRITE_REG(&adapter->hw, TDBAL,
- (tdba & 0x00000000ffffffffULL));
- IXGB_WRITE_REG(&adapter->hw, TDBAH, (tdba >> 32));
- IXGB_WRITE_REG(&adapter->hw, TDLEN,
- adapter->num_tx_desc *
- sizeof(struct ixgb_tx_desc));
-
- /* Setup the HW Tx Head and Tail descriptor pointers */
- IXGB_WRITE_REG(&adapter->hw, TDH, 0);
- IXGB_WRITE_REG(&adapter->hw, TDT, 0);
-
-
- HW_DEBUGOUT2("Base = %x, Length = %x\n",
- IXGB_READ_REG(&adapter->hw, TDBAL),
- IXGB_READ_REG(&adapter->hw, TDLEN));
-
- IXGB_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay);
-
-
- /* Program the Transmit Control Register */
- reg_tctl = IXGB_READ_REG(&adapter->hw, TCTL);
- reg_tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
- IXGB_WRITE_REG(&adapter->hw, TCTL, reg_tctl);
-
- /* Setup Transmit Descriptor Settings for this adapter */
- adapter->txd_cmd = IXGB_TX_DESC_TYPE | IXGB_TX_DESC_CMD_RS;
-
- if (adapter->tx_int_delay > 0)
- adapter->txd_cmd |= IXGB_TX_DESC_CMD_IDE;
- return;
-}
-
-/*********************************************************************
- *
- * Free all transmit related data structures.
- *
- **********************************************************************/
-static void
-ixgb_free_transmit_structures(struct adapter * adapter)
-{
- struct ixgb_buffer *tx_buffer;
- int i;
-
- INIT_DEBUGOUT("free_transmit_structures: begin");
-
- if (adapter->tx_buffer_area != NULL) {
- tx_buffer = adapter->tx_buffer_area;
- for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
- if (tx_buffer->m_head != NULL) {
- bus_dmamap_unload(adapter->txtag, tx_buffer->map);
- bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
- m_freem(tx_buffer->m_head);
- }
- tx_buffer->m_head = NULL;
- }
- }
- if (adapter->tx_buffer_area != NULL) {
- free(adapter->tx_buffer_area, M_DEVBUF);
- adapter->tx_buffer_area = NULL;
- }
- if (adapter->txtag != NULL) {
- bus_dma_tag_destroy(adapter->txtag);
- adapter->txtag = NULL;
- }
- return;
-}
-
-/*********************************************************************
- *
- * The offload context needs to be set when we transfer the first
- * packet of a particular protocol (TCP/UDP). We change the
- * context only if the protocol type changes.
- *
- **********************************************************************/
-static void
-ixgb_transmit_checksum_setup(struct adapter * adapter,
- struct mbuf * mp,
- u_int8_t * txd_popts)
-{
- struct ixgb_context_desc *TXD;
- struct ixgb_buffer *tx_buffer;
- int curr_txd;
-
- if (mp->m_pkthdr.csum_flags) {
-
- if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
- *txd_popts = IXGB_TX_DESC_POPTS_TXSM;
- if (adapter->active_checksum_context == OFFLOAD_TCP_IP)
- return;
- else
- adapter->active_checksum_context = OFFLOAD_TCP_IP;
- } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
- *txd_popts = IXGB_TX_DESC_POPTS_TXSM;
- if (adapter->active_checksum_context == OFFLOAD_UDP_IP)
- return;
- else
- adapter->active_checksum_context = OFFLOAD_UDP_IP;
- } else {
- *txd_popts = 0;
- return;
- }
- } else {
- *txd_popts = 0;
- return;
- }
-
- /*
- * If we reach this point, the checksum offload context needs to be
- * reset.
- */
- curr_txd = adapter->next_avail_tx_desc;
- tx_buffer = &adapter->tx_buffer_area[curr_txd];
- TXD = (struct ixgb_context_desc *) & adapter->tx_desc_base[curr_txd];
-
-
- TXD->tucss = ENET_HEADER_SIZE + sizeof(struct ip);
- TXD->tucse = 0;
-
- TXD->mss = 0;
-
- if (adapter->active_checksum_context == OFFLOAD_TCP_IP) {
- TXD->tucso =
- ENET_HEADER_SIZE + sizeof(struct ip) +
- offsetof(struct tcphdr, th_sum);
- } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) {
- TXD->tucso =
- ENET_HEADER_SIZE + sizeof(struct ip) +
- offsetof(struct udphdr, uh_sum);
- }
- TXD->cmd_type_len = IXGB_CONTEXT_DESC_CMD_TCP | IXGB_TX_DESC_CMD_RS | IXGB_CONTEXT_DESC_CMD_IDE;
-
- tx_buffer->m_head = NULL;
-
- if (++curr_txd == adapter->num_tx_desc)
- curr_txd = 0;
-
- adapter->num_tx_desc_avail--;
- adapter->next_avail_tx_desc = curr_txd;
- return;
-}
-
-/**********************************************************************
- *
- * Examine each tx_buffer in the used queue. If the hardware is done
- * processing the packet then free associated resources. The
- * tx_buffer is put back on the free queue.
- *
- **********************************************************************/
-static void
-ixgb_clean_transmit_interrupts(struct adapter * adapter)
-{
- int i, num_avail;
- struct ixgb_buffer *tx_buffer;
- struct ixgb_tx_desc *tx_desc;
-
- IXGB_LOCK_ASSERT(adapter);
-
- if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
- return;
-
-#ifdef _SV_
- adapter->clean_tx_interrupts++;
-#endif
- num_avail = adapter->num_tx_desc_avail;
- i = adapter->oldest_used_tx_desc;
-
- tx_buffer = &adapter->tx_buffer_area[i];
- tx_desc = &adapter->tx_desc_base[i];
-
- while (tx_desc->status & IXGB_TX_DESC_STATUS_DD) {
-
- tx_desc->status = 0;
- num_avail++;
-
- if (tx_buffer->m_head) {
- bus_dmamap_sync(adapter->txtag, tx_buffer->map,
- BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(adapter->txtag, tx_buffer->map);
- bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
- m_freem(tx_buffer->m_head);
- tx_buffer->m_head = NULL;
- }
- if (++i == adapter->num_tx_desc)
- i = 0;
-
- tx_buffer = &adapter->tx_buffer_area[i];
- tx_desc = &adapter->tx_desc_base[i];
- }
-
- adapter->oldest_used_tx_desc = i;
-
- /*
- * If we have enough room, clear IFF_DRV_OACTIVE to tell the stack that
- * it is OK to send packets. If there are no pending descriptors,
- * clear the timeout. Otherwise, if some descriptors have been freed,
- * restart the timeout.
- */
- if (num_avail > IXGB_TX_CLEANUP_THRESHOLD) {
- struct ifnet *ifp = adapter->ifp;
-
- ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
- if (num_avail == adapter->num_tx_desc)
- adapter->tx_timer = 0;
- else if (num_avail == adapter->num_tx_desc_avail)
- adapter->tx_timer = IXGB_TX_TIMEOUT;
- }
- adapter->num_tx_desc_avail = num_avail;
- return;
-}
-
-
-/*********************************************************************
- *
- * Get a buffer from system mbuf buffer pool.
- *
- **********************************************************************/
-static int
-ixgb_get_buf(int i, struct adapter * adapter,
- struct mbuf * nmp)
-{
- struct mbuf *mp = nmp;
- struct ixgb_buffer *rx_buffer;
- struct ifnet *ifp;
- bus_addr_t paddr;
- int error;
-
- ifp = adapter->ifp;
-
- if (mp == NULL) {
-
- mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
-
- if (mp == NULL) {
- adapter->mbuf_alloc_failed++;
- return (ENOBUFS);
- }
- mp->m_len = mp->m_pkthdr.len = MCLBYTES;
- } else {
- mp->m_len = mp->m_pkthdr.len = MCLBYTES;
- mp->m_data = mp->m_ext.ext_buf;
- mp->m_next = NULL;
- }
-
- if (ifp->if_mtu <= ETHERMTU) {
- m_adj(mp, ETHER_ALIGN);
- }
- rx_buffer = &adapter->rx_buffer_area[i];
-
- /*
- * Using memory from the mbuf cluster pool, invoke the bus_dma
- * machinery to arrange the memory mapping.
- */
- error = bus_dmamap_load(adapter->rxtag, rx_buffer->map,
- mtod(mp, void *), mp->m_len,
- ixgb_dmamap_cb, &paddr, 0);
- if (error) {
- m_free(mp);
- return (error);
- }
- rx_buffer->m_head = mp;
- adapter->rx_desc_base[i].buff_addr = htole64(paddr);
- bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD);
-
- return (0);
-}
-
-/*********************************************************************
- *
- * Allocate memory for rx_buffer structures. Since we use one
- * rx_buffer per received packet, the maximum number of rx_buffer's
- * that we'll need is equal to the number of receive descriptors
- * that we've allocated.
- *
- **********************************************************************/
-static int
-ixgb_allocate_receive_structures(struct adapter * adapter)
-{
- int i, error;
- struct ixgb_buffer *rx_buffer;
-
- if (!(adapter->rx_buffer_area =
- (struct ixgb_buffer *) malloc(sizeof(struct ixgb_buffer) *
- adapter->num_rx_desc, M_DEVBUF,
- M_NOWAIT | M_ZERO))) {
- device_printf(adapter->dev,
- "Unable to allocate rx_buffer memory\n");
- return (ENOMEM);
- }
- bzero(adapter->rx_buffer_area,
- sizeof(struct ixgb_buffer) * adapter->num_rx_desc);
-
- error = bus_dma_tag_create(bus_get_dma_tag(adapter->dev),/* parent */
- PAGE_SIZE, 0, /* alignment, bounds */
- BUS_SPACE_MAXADDR, /* lowaddr */
- BUS_SPACE_MAXADDR, /* highaddr */
- NULL, NULL, /* filter, filterarg */
- MCLBYTES, /* maxsize */
- 1, /* nsegments */
- MCLBYTES, /* maxsegsize */
- BUS_DMA_ALLOCNOW, /* flags */
-#if __FreeBSD_version >= 502000
- NULL, /* lockfunc */
- NULL, /* lockfuncarg */
-#endif
- &adapter->rxtag);
- if (error != 0) {
- device_printf(adapter->dev, "ixgb_allocate_receive_structures: "
- "bus_dma_tag_create failed; error %u\n",
- error);
- goto fail_0;
- }
- rx_buffer = adapter->rx_buffer_area;
- for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
- error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT,
- &rx_buffer->map);
- if (error != 0) {
- device_printf(adapter->dev,
- "ixgb_allocate_receive_structures: "
- "bus_dmamap_create failed; error %u\n",
- error);
- goto fail_1;
- }
- }
-
- for (i = 0; i < adapter->num_rx_desc; i++) {
- if (ixgb_get_buf(i, adapter, NULL) == ENOBUFS) {
- adapter->rx_buffer_area[i].m_head = NULL;
- adapter->rx_desc_base[i].buff_addr = 0;
- return (ENOBUFS);
- }
- }
-
- return (0);
-fail_1:
- bus_dma_tag_destroy(adapter->rxtag);
-fail_0:
- adapter->rxtag = NULL;
- free(adapter->rx_buffer_area, M_DEVBUF);
- adapter->rx_buffer_area = NULL;
- return (error);
-}
-
-/*********************************************************************
- *
- * Allocate and initialize receive structures.
- *
- **********************************************************************/
-static int
-ixgb_setup_receive_structures(struct adapter * adapter)
-{
- bzero((void *)adapter->rx_desc_base,
- (sizeof(struct ixgb_rx_desc)) * adapter->num_rx_desc);
-
- if (ixgb_allocate_receive_structures(adapter))
- return ENOMEM;
-
- /* Setup our descriptor pointers */
- adapter->next_rx_desc_to_check = 0;
- adapter->next_rx_desc_to_use = 0;
- return (0);
-}
-
-/*********************************************************************
- *
- * Enable receive unit.
- *
- **********************************************************************/
-static void
-ixgb_initialize_receive_unit(struct adapter * adapter)
-{
- u_int32_t reg_rctl;
- u_int32_t reg_rxcsum;
- u_int32_t reg_rxdctl;
- struct ifnet *ifp;
- u_int64_t rdba = adapter->rxdma.dma_paddr;
-
- ifp = adapter->ifp;
-
- /*
- * Make sure receives are disabled while setting up the descriptor
- * ring
- */
- reg_rctl = IXGB_READ_REG(&adapter->hw, RCTL);
- IXGB_WRITE_REG(&adapter->hw, RCTL, reg_rctl & ~IXGB_RCTL_RXEN);
-
- /* Set the Receive Delay Timer Register */
- IXGB_WRITE_REG(&adapter->hw, RDTR,
- adapter->rx_int_delay);
-
-
- /* Setup the Base and Length of the Rx Descriptor Ring */
- IXGB_WRITE_REG(&adapter->hw, RDBAL,
- (rdba & 0x00000000ffffffffULL));
- IXGB_WRITE_REG(&adapter->hw, RDBAH, (rdba >> 32));
- IXGB_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc *
- sizeof(struct ixgb_rx_desc));
-
- /* Setup the HW Rx Head and Tail Descriptor Pointers */
- IXGB_WRITE_REG(&adapter->hw, RDH, 0);
-
- IXGB_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1);
-
-
-
- reg_rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT
- | RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT
- | RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
- IXGB_WRITE_REG(&adapter->hw, RXDCTL, reg_rxdctl);
-
-
- adapter->raidc = 1;
- if (adapter->raidc) {
- uint32_t raidc;
- uint8_t poll_threshold;
-#define IXGB_RAIDC_POLL_DEFAULT 120
-
- poll_threshold = ((adapter->num_rx_desc - 1) >> 3);
- poll_threshold >>= 1;
- poll_threshold &= 0x3F;
- raidc = IXGB_RAIDC_EN | IXGB_RAIDC_RXT_GATE |
- (IXGB_RAIDC_POLL_DEFAULT << IXGB_RAIDC_POLL_SHIFT) |
- (adapter->rx_int_delay << IXGB_RAIDC_DELAY_SHIFT) |
- poll_threshold;
- IXGB_WRITE_REG(&adapter->hw, RAIDC, raidc);
- }
- /* Enable Receive Checksum Offload for TCP and UDP ? */
- if (ifp->if_capenable & IFCAP_RXCSUM) {
- reg_rxcsum = IXGB_READ_REG(&adapter->hw, RXCSUM);
- reg_rxcsum |= IXGB_RXCSUM_TUOFL;
- IXGB_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum);
- }
- /* Setup the Receive Control Register */
- reg_rctl = IXGB_READ_REG(&adapter->hw, RCTL);
- reg_rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
- reg_rctl |= IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 | IXGB_RCTL_SECRC |
- IXGB_RCTL_CFF |
- (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
-
- switch (adapter->rx_buffer_len) {
- default:
- case IXGB_RXBUFFER_2048:
- reg_rctl |= IXGB_RCTL_BSIZE_2048;
- break;
- case IXGB_RXBUFFER_4096:
- reg_rctl |= IXGB_RCTL_BSIZE_4096;
- break;
- case IXGB_RXBUFFER_8192:
- reg_rctl |= IXGB_RCTL_BSIZE_8192;
- break;
- case IXGB_RXBUFFER_16384:
- reg_rctl |= IXGB_RCTL_BSIZE_16384;
- break;
- }
-
- reg_rctl |= IXGB_RCTL_RXEN;
-
-
- /* Enable Receives */
- IXGB_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
-
- return;
-}
-
-/*********************************************************************
- *
- * Free receive related data structures.
- *
- **********************************************************************/
-static void
-ixgb_free_receive_structures(struct adapter * adapter)
-{
- struct ixgb_buffer *rx_buffer;
- int i;
-
- INIT_DEBUGOUT("free_receive_structures: begin");
-
- if (adapter->rx_buffer_area != NULL) {
- rx_buffer = adapter->rx_buffer_area;
- for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
- if (rx_buffer->map != NULL) {
- bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
- bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
- }
- if (rx_buffer->m_head != NULL)
- m_freem(rx_buffer->m_head);
- rx_buffer->m_head = NULL;
- }
- }
- if (adapter->rx_buffer_area != NULL) {
- free(adapter->rx_buffer_area, M_DEVBUF);
- adapter->rx_buffer_area = NULL;
- }
- if (adapter->rxtag != NULL) {
- bus_dma_tag_destroy(adapter->rxtag);
- adapter->rxtag = NULL;
- }
- return;
-}
-
-/*********************************************************************
- *
- * This routine executes in interrupt context. It replenishes
- * the mbufs in the descriptor and sends data which has been
- * dma'ed into host memory to upper layer.
- *
- * We loop at most count times if count is > 0, or until done if
- * count < 0.
- *
- *********************************************************************/
-static int
-ixgb_process_receive_interrupts(struct adapter * adapter, int count)
-{
- struct ifnet *ifp;
- struct mbuf *mp;
-#if __FreeBSD_version < 500000
- struct ether_header *eh;
-#endif
- int eop = 0;
- int len;
- u_int8_t accept_frame = 0;
- int i;
- int next_to_use = 0;
- int eop_desc;
- int rx_npkts = 0;
- /* Pointer to the receive descriptor being examined. */
- struct ixgb_rx_desc *current_desc;
-
- IXGB_LOCK_ASSERT(adapter);
-
- ifp = adapter->ifp;
- i = adapter->next_rx_desc_to_check;
- next_to_use = adapter->next_rx_desc_to_use;
- eop_desc = adapter->next_rx_desc_to_check;
- current_desc = &adapter->rx_desc_base[i];
-
- if (!((current_desc->status) & IXGB_RX_DESC_STATUS_DD)) {
-#ifdef _SV_
- adapter->no_pkts_avail++;
-#endif
- return (rx_npkts);
- }
- while ((current_desc->status & IXGB_RX_DESC_STATUS_DD) && (count != 0)) {
-
- mp = adapter->rx_buffer_area[i].m_head;
- bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
- BUS_DMASYNC_POSTREAD);
- accept_frame = 1;
- if (current_desc->status & IXGB_RX_DESC_STATUS_EOP) {
- count--;
- eop = 1;
- } else {
- eop = 0;
- }
- len = current_desc->length;
-
- if (current_desc->errors & (IXGB_RX_DESC_ERRORS_CE |
- IXGB_RX_DESC_ERRORS_SE | IXGB_RX_DESC_ERRORS_P |
- IXGB_RX_DESC_ERRORS_RXE)) {
- accept_frame = 0;
- }
- if (accept_frame) {
-
- /* Assign correct length to the current fragment */
- mp->m_len = len;
-
- if (adapter->fmp == NULL) {
- mp->m_pkthdr.len = len;
- adapter->fmp = mp; /* Store the first mbuf */
- adapter->lmp = mp;
- } else {
- /* Chain mbuf's together */
- mp->m_flags &= ~M_PKTHDR;
- adapter->lmp->m_next = mp;
- adapter->lmp = adapter->lmp->m_next;
- adapter->fmp->m_pkthdr.len += len;
- }
-
- if (eop) {
- eop_desc = i;
- adapter->fmp->m_pkthdr.rcvif = ifp;
-
-#if __FreeBSD_version < 500000
- eh = mtod(adapter->fmp, struct ether_header *);
-
- /* Remove ethernet header from mbuf */
- m_adj(adapter->fmp, sizeof(struct ether_header));
- ixgb_receive_checksum(adapter, current_desc,
- adapter->fmp);
-
- if (current_desc->status & IXGB_RX_DESC_STATUS_VP)
- VLAN_INPUT_TAG(eh, adapter->fmp,
- current_desc->special);
- else
- ether_input(ifp, eh, adapter->fmp);
-#else
- ixgb_receive_checksum(adapter, current_desc,
- adapter->fmp);
-#if __FreeBSD_version < 700000
- if (current_desc->status & IXGB_RX_DESC_STATUS_VP)
- VLAN_INPUT_TAG(ifp, adapter->fmp,
- current_desc->special);
-#else
- if (current_desc->status & IXGB_RX_DESC_STATUS_VP) {
- adapter->fmp->m_pkthdr.ether_vtag =
- current_desc->special;
- adapter->fmp->m_flags |= M_VLANTAG;
- }
-#endif
-
- if (adapter->fmp != NULL) {
- IXGB_UNLOCK(adapter);
- (*ifp->if_input) (ifp, adapter->fmp);
- IXGB_LOCK(adapter);
- rx_npkts++;
- }
-#endif
- adapter->fmp = NULL;
- adapter->lmp = NULL;
- }
- adapter->rx_buffer_area[i].m_head = NULL;
- } else {
- adapter->dropped_pkts++;
- if (adapter->fmp != NULL)
- m_freem(adapter->fmp);
- adapter->fmp = NULL;
- adapter->lmp = NULL;
- }
-
- /* Zero out the receive descriptors status */
- current_desc->status = 0;
-
- /* Advance our pointers to the next descriptor */
- if (++i == adapter->num_rx_desc) {
- i = 0;
- current_desc = adapter->rx_desc_base;
- } else
- current_desc++;
- }
- adapter->next_rx_desc_to_check = i;
-
- if (--i < 0)
- i = (adapter->num_rx_desc - 1);
-
- /*
- * 82597EX: Workaround for redundent write back in receive descriptor ring (causes
- * memory corruption). Avoid using and re-submitting the most recently received RX
- * descriptor back to hardware.
- *
- * if(Last written back descriptor == EOP bit set descriptor)
- * then avoid re-submitting the most recently received RX descriptor
- * back to hardware.
- * if(Last written back descriptor != EOP bit set descriptor)
- * then avoid re-submitting the most recently received RX descriptors
- * till last EOP bit set descriptor.
- */
- if (eop_desc != i) {
- if (++eop_desc == adapter->num_rx_desc)
- eop_desc = 0;
- i = eop_desc;
- }
- /* Replenish the descriptors with new mbufs till last EOP bit set descriptor */
- while (next_to_use != i) {
- current_desc = &adapter->rx_desc_base[next_to_use];
- if ((current_desc->errors & (IXGB_RX_DESC_ERRORS_CE |
- IXGB_RX_DESC_ERRORS_SE | IXGB_RX_DESC_ERRORS_P |
- IXGB_RX_DESC_ERRORS_RXE))) {
- mp = adapter->rx_buffer_area[next_to_use].m_head;
- ixgb_get_buf(next_to_use, adapter, mp);
- } else {
- if (ixgb_get_buf(next_to_use, adapter, NULL) == ENOBUFS)
- break;
- }
- /* Advance our pointers to the next descriptor */
- if (++next_to_use == adapter->num_rx_desc) {
- next_to_use = 0;
- current_desc = adapter->rx_desc_base;
- } else
- current_desc++;
- }
- adapter->next_rx_desc_to_use = next_to_use;
- if (--next_to_use < 0)
- next_to_use = (adapter->num_rx_desc - 1);
- /* Advance the IXGB's Receive Queue #0 "Tail Pointer" */
- IXGB_WRITE_REG(&adapter->hw, RDT, next_to_use);
-
- return (rx_npkts);
-}
-
-/*********************************************************************
- *
- * Verify that the hardware indicated that the checksum is valid.
- * Inform the stack about the status of checksum so that stack
- * doesn't spend time verifying the checksum.
- *
- *********************************************************************/
-static void
-ixgb_receive_checksum(struct adapter * adapter,
- struct ixgb_rx_desc * rx_desc,
- struct mbuf * mp)
-{
- if (rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) {
- mp->m_pkthdr.csum_flags = 0;
- return;
- }
- if (rx_desc->status & IXGB_RX_DESC_STATUS_IPCS) {
- /* Did it pass? */
- if (!(rx_desc->errors & IXGB_RX_DESC_ERRORS_IPE)) {
- /* IP Checksum Good */
- mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
- mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
-
- } else {
- mp->m_pkthdr.csum_flags = 0;
- }
- }
- if (rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS) {
- /* Did it pass? */
- if (!(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE)) {
- mp->m_pkthdr.csum_flags |=
- (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
- mp->m_pkthdr.csum_data = htons(0xffff);
- }
- }
- return;
-}
-
-
-static void
-ixgb_enable_vlans(struct adapter * adapter)
-{
- uint32_t ctrl;
-
- ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
- ctrl |= IXGB_CTRL0_VME;
- IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
-
- return;
-}
-
-
-static void
-ixgb_enable_intr(struct adapter * adapter)
-{
- IXGB_WRITE_REG(&adapter->hw, IMS, (IXGB_INT_RXT0 | IXGB_INT_TXDW |
- IXGB_INT_RXDMT0 | IXGB_INT_LSC | IXGB_INT_RXO));
- return;
-}
-
-static void
-ixgb_disable_intr(struct adapter * adapter)
-{
- IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
- return;
-}
-
-void
-ixgb_write_pci_cfg(struct ixgb_hw * hw,
- uint32_t reg,
- uint16_t * value)
-{
- pci_write_config(((struct ixgb_osdep *) hw->back)->dev, reg,
- *value, 2);
-}
-
-/**********************************************************************
- *
- * Update the board statistics counters.
- *
- **********************************************************************/
-static void
-ixgb_update_stats_counters(struct adapter * adapter)
-{
-
- adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
- adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
- adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
- adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
- adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
- adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
- adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
- adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
- adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
- adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
-
- adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
- adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
- adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
- adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
- adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
- adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
- adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
- adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
- adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
- adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
- adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
- adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
- adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
- adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
- adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
- adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
- adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
- adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
- adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
- adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
- adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
- adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
- adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
- adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
- adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
- adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
- adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
-
- adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
- adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
- adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
- adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
- adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
- adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
- adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
- adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
- adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
- adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
- adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
- adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
- adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
- adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
- adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
- adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
- adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
- adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
- adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
- adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
- adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
- adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
-}
-
-static uint64_t
-ixgb_get_counter(struct ifnet *ifp, ift_counter cnt)
-{
- struct adapter *adapter;
-
- adapter = if_getsoftc(ifp);
-
- switch (cnt) {
- case IFCOUNTER_IPACKETS:
- return (adapter->stats.gprcl);
- case IFCOUNTER_OPACKETS:
- return ( adapter->stats.gptcl);
- case IFCOUNTER_IBYTES:
- return (adapter->stats.gorcl);
- case IFCOUNTER_OBYTES:
- return (adapter->stats.gotcl);
- case IFCOUNTER_IMCASTS:
- return ( adapter->stats.mprcl);
- case IFCOUNTER_COLLISIONS:
- return (0);
- case IFCOUNTER_IERRORS:
- return (adapter->dropped_pkts + adapter->stats.crcerrs +
- adapter->stats.rnbc + adapter->stats.mpc +
- adapter->stats.rlec);
- default:
- return (if_get_counter_default(ifp, cnt));
- }
-}
-
-/**********************************************************************
- *
- * This routine is called only when ixgb_display_debug_stats is enabled.
- * This routine provides a way to take a look at important statistics
- * maintained by the driver and hardware.
- *
- **********************************************************************/
-static void
-ixgb_print_hw_stats(struct adapter * adapter)
-{
- char buf_speed[100], buf_type[100];
- ixgb_bus_speed bus_speed;
- ixgb_bus_type bus_type;
- device_t dev;
-
- dev = adapter->dev;
-#ifdef _SV_
- device_printf(dev, "Packets not Avail = %ld\n",
- adapter->no_pkts_avail);
- device_printf(dev, "CleanTxInterrupts = %ld\n",
- adapter->clean_tx_interrupts);
- device_printf(dev, "ICR RXDMT0 = %lld\n",
- (long long)adapter->sv_stats.icr_rxdmt0);
- device_printf(dev, "ICR RXO = %lld\n",
- (long long)adapter->sv_stats.icr_rxo);
- device_printf(dev, "ICR RXT0 = %lld\n",
- (long long)adapter->sv_stats.icr_rxt0);
- device_printf(dev, "ICR TXDW = %lld\n",
- (long long)adapter->sv_stats.icr_TXDW);
-#endif /* _SV_ */
-
- bus_speed = adapter->hw.bus.speed;
- bus_type = adapter->hw.bus.type;
- sprintf(buf_speed,
- bus_speed == ixgb_bus_speed_33 ? "33MHz" :
- bus_speed == ixgb_bus_speed_66 ? "66MHz" :
- bus_speed == ixgb_bus_speed_100 ? "100MHz" :
- bus_speed == ixgb_bus_speed_133 ? "133MHz" :
- "UNKNOWN");
- device_printf(dev, "PCI_Bus_Speed = %s\n",
- buf_speed);
-
- sprintf(buf_type,
- bus_type == ixgb_bus_type_pci ? "PCI" :
- bus_type == ixgb_bus_type_pcix ? "PCI-X" :
- "UNKNOWN");
- device_printf(dev, "PCI_Bus_Type = %s\n",
- buf_type);
-
- device_printf(dev, "Tx Descriptors not Avail1 = %ld\n",
- adapter->no_tx_desc_avail1);
- device_printf(dev, "Tx Descriptors not Avail2 = %ld\n",
- adapter->no_tx_desc_avail2);
- device_printf(dev, "Std Mbuf Failed = %ld\n",
- adapter->mbuf_alloc_failed);
- device_printf(dev, "Std Cluster Failed = %ld\n",
- adapter->mbuf_cluster_failed);
-
- device_printf(dev, "Defer count = %lld\n",
- (long long)adapter->stats.dc);
- device_printf(dev, "Missed Packets = %lld\n",
- (long long)adapter->stats.mpc);
- device_printf(dev, "Receive No Buffers = %lld\n",
- (long long)adapter->stats.rnbc);
- device_printf(dev, "Receive length errors = %lld\n",
- (long long)adapter->stats.rlec);
- device_printf(dev, "Crc errors = %lld\n",
- (long long)adapter->stats.crcerrs);
- device_printf(dev, "Driver dropped packets = %ld\n",
- adapter->dropped_pkts);
-
- device_printf(dev, "XON Rcvd = %lld\n",
- (long long)adapter->stats.xonrxc);
- device_printf(dev, "XON Xmtd = %lld\n",
- (long long)adapter->stats.xontxc);
- device_printf(dev, "XOFF Rcvd = %lld\n",
- (long long)adapter->stats.xoffrxc);
- device_printf(dev, "XOFF Xmtd = %lld\n",
- (long long)adapter->stats.xofftxc);
-
- device_printf(dev, "Good Packets Rcvd = %lld\n",
- (long long)adapter->stats.gprcl);
- device_printf(dev, "Good Packets Xmtd = %lld\n",
- (long long)adapter->stats.gptcl);
-
- device_printf(dev, "Jumbo frames recvd = %lld\n",
- (long long)adapter->stats.jprcl);
- device_printf(dev, "Jumbo frames Xmtd = %lld\n",
- (long long)adapter->stats.jptcl);
-
- return;
-
-}
-
-static int
-ixgb_sysctl_stats(SYSCTL_HANDLER_ARGS)
-{
- int error;
- int result;
- struct adapter *adapter;
-
- result = -1;
- error = sysctl_handle_int(oidp, &result, 0, req);
-
- if (error || !req->newptr)
- return (error);
-
- if (result == 1) {
- adapter = (struct adapter *) arg1;
- ixgb_print_hw_stats(adapter);
- }
- return error;
-}
Index: sys/dev/ixgb/if_ixgb_osdep.h
===================================================================
--- sys/dev/ixgb/if_ixgb_osdep.h
+++ sys/dev/ixgb/if_ixgb_osdep.h
@@ -1,121 +0,0 @@
-/*******************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2001-2004, Intel Corporation
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-***************************************************************************/
-
-/*$FreeBSD$*/
-
-#ifndef _FREEBSD_OS_H_
-#define _FREEBSD_OS_H_
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-#include <sys/protosw.h>
-#include <sys/socket.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-#if __FreeBSD_version >= 502000
- #include <dev/pci/pcivar.h>
- #include <dev/pci/pcireg.h>
-#else
- #include <pci/pcivar.h>
- #include <pci/pcireg.h>
-#endif
-
-#define ASSERT(x) if(!(x)) panic("IXGB: x")
-
-/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000*(x))
-
-#define DBG 0
-#define MSGOUT(S, A, B) printf(S "\n", A, B)
-#define DEBUGFUNC(F) DEBUGOUT(F);
-#if DBG
- #define DEBUGOUT(S) printf(S "\n")
- #define DEBUGOUT1(S,A) printf(S "\n",A)
- #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
- #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
- #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
-#else
- #define DEBUGOUT(S)
- #define DEBUGOUT1(S,A)
- #define DEBUGOUT2(S,A,B)
- #define DEBUGOUT3(S,A,B,C)
- #define DEBUGOUT7(S,A,B,C,D,E,F,G)
-#endif
-
-#define FALSE 0
-#define TRUE 1
-#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
-#define PCI_COMMAND_REGISTER PCIR_COMMAND
-
-#define le16_to_cpu
-
-struct ixgb_osdep
-{
- bus_space_tag_t mem_bus_space_tag;
- bus_space_handle_t mem_bus_space_handle;
- device_t dev;
-};
-
-#define IXGB_WRITE_FLUSH(a) IXGB_READ_REG(a, STATUS)
-
-#define IXGB_READ_REG(a, reg) (\
- bus_space_read_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
- ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
- IXGB_##reg))
-
-#define IXGB_WRITE_REG(a, reg, value) (\
- bus_space_write_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
- ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
- IXGB_##reg, value))
-
-
-#define IXGB_READ_REG_ARRAY(a, reg, offset) (\
- bus_space_read_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
- ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
- (IXGB_##reg + ((offset) << 2))))
-
-#define IXGB_WRITE_REG_ARRAY(a, reg, offset, value) (\
- bus_space_write_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
- ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
- (IXGB_##reg + ((offset) << 2)), value))
-
-#endif /* _FREEBSD_OS_H_ */
-
Index: sys/dev/ixgb/ixgb_ee.h
===================================================================
--- sys/dev/ixgb/ixgb_ee.h
+++ sys/dev/ixgb/ixgb_ee.h
@@ -1,118 +0,0 @@
-/*******************************************************************************
- SPDX-License-Identifier: BSD-3-Clause
-
- Copyright (c) 2001-2004, Intel Corporation
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-/*$FreeBSD$*/
-#ifndef _IXGB_EE_H_
-#define _IXGB_EE_H_
-
-
-#define IXGB_EEPROM_SIZE 64 /* Size in words */
-
-#define IXGB_ETH_LENGTH_OF_ADDRESS 6
-
-
-/* EEPROM Commands */
-#define EEPROM_READ_OPCODE 0x6 /* EERPOM read opcode */
-#define EEPROM_WRITE_OPCODE 0x5 /* EERPOM write opcode */
-#define EEPROM_ERASE_OPCODE 0x7 /* EERPOM erase opcode */
-#define EEPROM_EWEN_OPCODE 0x13 /* EERPOM erase/write enable */
-#define EEPROM_EWDS_OPCODE 0x10 /* EERPOM erast/write disable */
-
-/* EEPROM MAP (Word Offsets) */
-#define EEPROM_IA_1_2_REG 0x0000
-#define EEPROM_IA_3_4_REG 0x0001
-#define EEPROM_IA_5_6_REG 0x0002
-#define EEPROM_COMPATIBILITY_REG 0x0003
-#define EEPROM_PBA_1_2_REG 0x0008
-#define EEPROM_PBA_3_4_REG 0x0009
-#define EEPROM_INIT_CONTROL1_REG 0x000A
-#define EEPROM_SUBSYS_ID_REG 0x000B
-#define EEPROM_SUBVEND_ID_REG 0x000C
-#define EEPROM_DEVICE_ID_REG 0x000D
-#define EEPROM_VENDOR_ID_REG 0x000E
-#define EEPROM_INIT_CONTROL2_REG 0x000F
-#define EEPROM_SWDPINS_REG 0x0020
-#define EEPROM_CIRCUIT_CTRL_REG 0x0021
-#define EEPROM_D0_D3_POWER_REG 0x0022
-#define EEPROM_FLASH_VERSION 0x0032
-#define EEPROM_CHECKSUM_REG 0x003F
-
-/* Mask bits for fields in Word 0x0a of the EEPROM */
-
-#define EEPROM_ICW1_SIGNATURE_MASK 0xC000
-#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
-
-/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
-#define EEPROM_SUM 0xBABA
-
-/* EEPROM Map Sizes (Byte Counts) */
-#define PBA_SIZE 4
-
-/* EEPROM Map defines (WORD OFFSETS)*/
-
-/* EEPROM structure */
-struct ixgb_ee_map_type{
- uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
- uint16_t compatibility;
- uint16_t reserved1[4];
- uint32_t pba_number;
- uint16_t init_ctrl_reg_1;
- uint16_t subsystem_id;
- uint16_t subvendor_id;
- uint16_t device_id;
- uint16_t vendor_id;
- uint16_t init_ctrl_reg_2;
- uint16_t oem_reserved[16];
- uint16_t swdpins_reg;
- uint16_t circuit_ctrl_reg;
- uint8_t d3_power;
- uint8_t d0_power;
- uint16_t reserved2[28];
- uint16_t checksum;
- };
-
-/* EEPROM Functions */
-uint16_t ixgb_read_eeprom(struct ixgb_hw *hw,
- uint16_t reg);
-
-boolean_t ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
-
-void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
-
-void ixgb_write_eeprom(struct ixgb_hw *hw,
- uint16_t reg,
- uint16_t data);
-
-#endif /* IXGB_EE_H */
-
Index: sys/dev/ixgb/ixgb_ee.c
===================================================================
--- sys/dev/ixgb/ixgb_ee.c
+++ sys/dev/ixgb/ixgb_ee.c
@@ -1,782 +0,0 @@
-/*******************************************************************************
- SPDX-License-Identifier: BSD-3-Clause
-
- Copyright (c) 2001-2004, Intel Corporation
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-/*$FreeBSD$*/
-
-#include <dev/ixgb/ixgb_hw.h>
-#include <dev/ixgb/ixgb_ee.h>
-
-/* Local prototypes */
-static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw);
-
-static void ixgb_shift_out_bits(struct ixgb_hw *hw,
- uint16_t data,
- uint16_t count);
-static void ixgb_standby_eeprom(struct ixgb_hw *hw);
-
-static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw);
-
-static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
-
-/******************************************************************************
- * Raises the EEPROM's clock input.
- *
- * hw - Struct containing variables accessed by shared code
- * eecd_reg - EECD's current value
- *****************************************************************************/
-static void
-ixgb_raise_clock(struct ixgb_hw *hw,
- uint32_t *eecd_reg)
-{
- /* Raise the clock input to the EEPROM (by setting the SK bit), and then
- * wait 50 microseconds.
- */
- *eecd_reg = *eecd_reg | IXGB_EECD_SK;
- IXGB_WRITE_REG(hw, EECD, *eecd_reg);
- usec_delay(50);
- return;
-}
-
-/******************************************************************************
- * Lowers the EEPROM's clock input.
- *
- * hw - Struct containing variables accessed by shared code
- * eecd_reg - EECD's current value
- *****************************************************************************/
-static void
-ixgb_lower_clock(struct ixgb_hw *hw,
- uint32_t *eecd_reg)
-{
- /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
- * wait 50 microseconds.
- */
- *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
- IXGB_WRITE_REG(hw, EECD, *eecd_reg);
- usec_delay(50);
- return;
-}
-
-/******************************************************************************
- * Shift data bits out to the EEPROM.
- *
- * hw - Struct containing variables accessed by shared code
- * data - data to send to the EEPROM
- * count - number of bits to shift out
- *****************************************************************************/
-static void
-ixgb_shift_out_bits(struct ixgb_hw *hw,
- uint16_t data,
- uint16_t count)
-{
- uint32_t eecd_reg;
- uint32_t mask;
-
- /* We need to shift "count" bits out to the EEPROM. So, value in the
- * "data" parameter will be shifted out to the EEPROM one bit at a time.
- * In order to do this, "data" must be broken down into bits.
- */
- mask = 0x01 << (count - 1);
- eecd_reg = IXGB_READ_REG(hw, EECD);
- eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
- do {
- /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
- * and then raising and then lowering the clock (the SK bit controls
- * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
- * by setting "DI" to "0" and then raising and then lowering the clock.
- */
- eecd_reg &= ~IXGB_EECD_DI;
-
- if(data & mask)
- eecd_reg |= IXGB_EECD_DI;
-
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
-
- usec_delay(50);
-
- ixgb_raise_clock(hw, &eecd_reg);
- ixgb_lower_clock(hw, &eecd_reg);
-
- mask = mask >> 1;
-
- } while(mask);
-
- /* We leave the "DI" bit set to "0" when we leave this routine. */
- eecd_reg &= ~IXGB_EECD_DI;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- return;
-}
-
-/******************************************************************************
- * Shift data bits in from the EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-static uint16_t
-ixgb_shift_in_bits(struct ixgb_hw *hw)
-{
- uint32_t eecd_reg;
- uint32_t i;
- uint16_t data;
-
- /* In order to read a register from the EEPROM, we need to shift 16 bits
- * in from the EEPROM. Bits are "shifted in" by raising the clock input to
- * the EEPROM (setting the SK bit), and then reading the value of the "DO"
- * bit. During this "shifting in" process the "DI" bit should always be
- * clear..
- */
-
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
- data = 0;
-
- for(i = 0; i < 16; i++) {
- data = data << 1;
- ixgb_raise_clock(hw, &eecd_reg);
-
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- eecd_reg &= ~(IXGB_EECD_DI);
- if(eecd_reg & IXGB_EECD_DO)
- data |= 1;
-
- ixgb_lower_clock(hw, &eecd_reg);
- }
-
- return data;
-}
-
-/******************************************************************************
- * Prepares EEPROM for access
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
- * function should be called before issuing a command to the EEPROM.
- *****************************************************************************/
-static void
-ixgb_setup_eeprom(struct ixgb_hw *hw)
-{
- uint32_t eecd_reg;
-
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- /* Clear SK and DI */
- eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
-
- /* Set CS */
- eecd_reg |= IXGB_EECD_CS;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- return;
-}
-
-/******************************************************************************
- * Returns EEPROM to a "standby" state
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-static void
-ixgb_standby_eeprom(struct ixgb_hw *hw)
-{
- uint32_t eecd_reg;
-
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- /* Deselct EEPROM */
- eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- usec_delay(50);
-
- /* Clock high */
- eecd_reg |= IXGB_EECD_SK;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- usec_delay(50);
-
- /* Select EEPROM */
- eecd_reg |= IXGB_EECD_CS;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- usec_delay(50);
-
- /* Clock low */
- eecd_reg &= ~IXGB_EECD_SK;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- usec_delay(50);
- return;
-}
-
-/******************************************************************************
- * Raises then lowers the EEPROM's clock pin
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-static void
-ixgb_clock_eeprom(struct ixgb_hw *hw)
-{
- uint32_t eecd_reg;
-
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- /* Rising edge of clock */
- eecd_reg |= IXGB_EECD_SK;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- usec_delay(50);
-
- /* Falling edge of clock */
- eecd_reg &= ~IXGB_EECD_SK;
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
- usec_delay(50);
- return;
-}
-
-/******************************************************************************
- * Terminates a command by lowering the EEPROM's chip select pin
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-static void
-ixgb_cleanup_eeprom(struct ixgb_hw *hw)
-{
- uint32_t eecd_reg;
-
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
-
- IXGB_WRITE_REG(hw, EECD, eecd_reg);
-
- ixgb_clock_eeprom(hw);
- return;
-}
-
-/******************************************************************************
- * Waits for the EEPROM to finish the current command.
- *
- * hw - Struct containing variables accessed by shared code
- *
- * The command is done when the EEPROM's data out pin goes high.
- *
- * Returns:
- * TRUE: EEPROM data pin is high before timeout.
- * FALSE: Time expired.
- *****************************************************************************/
-static boolean_t
-ixgb_wait_eeprom_command(struct ixgb_hw *hw)
-{
- uint32_t eecd_reg;
- uint32_t i;
-
-
- /* Toggle the CS line. This in effect tells to EEPROM to actually execute
- * the command in question.
- */
- ixgb_standby_eeprom(hw);
-
- /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM will
- * signal that the command has been completed by raising the DO signal.
- * If DO does not go high in 10 milliseconds, then error out.
- */
- for(i = 0; i < 200; i++) {
- eecd_reg = IXGB_READ_REG(hw, EECD);
-
- if(eecd_reg & IXGB_EECD_DO)
- return (TRUE);
-
- usec_delay(50);
- }
- ASSERT(0);
- return (FALSE);
-}
-
-
-/******************************************************************************
- * Verifies that the EEPROM has a valid checksum
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Reads the first 64 16 bit words of the EEPROM and sums the values read.
- * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
- * valid.
- *
- * Returns:
- * TRUE: Checksum is valid
- * FALSE: Checksum is not valid.
- *****************************************************************************/
-boolean_t
-ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
-{
- uint16_t checksum = 0;
- uint16_t i;
-
- for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
- checksum += ixgb_read_eeprom(hw, i);
-
- if(checksum == (uint16_t) EEPROM_SUM)
- return (TRUE);
- else
- return (FALSE);
-}
-
-/******************************************************************************
- * Calculates the EEPROM checksum and writes it to the EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
- * Writes the difference to word offset 63 of the EEPROM.
- *****************************************************************************/
-void
-ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
-{
- uint16_t checksum = 0;
- uint16_t i;
-
- for(i = 0; i < EEPROM_CHECKSUM_REG; i++)
- checksum += ixgb_read_eeprom(hw, i);
-
- checksum = (uint16_t) EEPROM_SUM - checksum;
-
- ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
- return;
-}
-
-/******************************************************************************
- * Writes a 16 bit word to a given offset in the EEPROM.
- *
- * hw - Struct containing variables accessed by shared code
- * reg - offset within the EEPROM to be written to
- * data - 16 bit word to be written to the EEPROM
- *
- * If ixgb_update_eeprom_checksum is not called after this function, the
- * EEPROM will most likely contain an invalid checksum.
- *
- *****************************************************************************/
-void
-ixgb_write_eeprom(struct ixgb_hw *hw,
- uint16_t offset,
- uint16_t data)
-{
- /* Prepare the EEPROM for writing */
- ixgb_setup_eeprom(hw);
-
- /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
- * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
- */
- ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
- ixgb_shift_out_bits(hw, 0, 4);
-
- /* Prepare the EEPROM */
- ixgb_standby_eeprom(hw);
-
- /* Send the Write command (3-bit opcode + 6-bit addr) */
- ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
- ixgb_shift_out_bits(hw, offset, 6);
-
- /* Send the data */
- ixgb_shift_out_bits(hw, data, 16);
-
- ixgb_wait_eeprom_command(hw);
-
- /* Recover from write */
- ixgb_standby_eeprom(hw);
-
- /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
- * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
- * mode.
- */
- ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
- ixgb_shift_out_bits(hw, 0, 4);
-
- /* Done with writing */
- ixgb_cleanup_eeprom(hw);
-
- return;
-}
-
-/******************************************************************************
- * Reads a 16 bit word from the EEPROM.
- *
- * hw - Struct containing variables accessed by shared code
- * offset - offset of 16 bit word in the EEPROM to read
- *
- * Returns:
- * The 16-bit value read from the eeprom
- *****************************************************************************/
-uint16_t
-ixgb_read_eeprom(struct ixgb_hw *hw,
- uint16_t offset)
-{
- uint16_t data;
-
- /* Prepare the EEPROM for reading */
- ixgb_setup_eeprom(hw);
-
- /* Send the READ command (opcode + addr) */
- ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
- /*
- * We have a 64 word EEPROM, there are 6 address bits
- */
- ixgb_shift_out_bits(hw, offset, 6);
-
- /* Read the data */
- data = ixgb_shift_in_bits(hw);
-
- /* End this read operation */
- ixgb_standby_eeprom(hw);
-
- return (data);
-}
-
-/******************************************************************************
- * Reads eeprom and stores data in shared structure.
- * Validates eeprom checksum and eeprom signature.
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * TRUE: if eeprom read is successful
- * FALSE: otherwise.
- *****************************************************************************/
-boolean_t
-ixgb_get_eeprom_data(struct ixgb_hw *hw)
-{
- uint16_t i;
- uint16_t checksum = 0;
- struct ixgb_ee_map_type *ee_map;
-
- DEBUGFUNC("ixgb_get_eeprom_data");
-
- ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- DEBUGOUT("ixgb_ee: Reading eeprom data\n");
- for (i=0; i < IXGB_EEPROM_SIZE ; i++) {
- uint16_t ee_data;
- ee_data = ixgb_read_eeprom(hw, i);
- checksum += ee_data;
- hw->eeprom[i] = le16_to_cpu (ee_data);
- }
-
- if (checksum != (uint16_t) EEPROM_SUM) {
- DEBUGOUT("ixgb_ee: Checksum invalid.\n");
- return (FALSE);
- }
-
- if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
- != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
- DEBUGOUT("ixgb_ee: Signature invalid.\n");
- return(FALSE);
- }
-
- return(TRUE);
-}
-
-
-/******************************************************************************
- * Local function to check if the eeprom signature is good
- * If the eeprom signature is good, calls ixgb)get_eeprom_data.
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * TRUE: eeprom signature was good and the eeprom read was successful
- * FALSE: otherwise.
- ******************************************************************************/
-static boolean_t
-ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
-
- if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
- == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
- return (TRUE);
- } else {
- return ixgb_get_eeprom_data(hw);
- }
-}
-
-/******************************************************************************
- * return a word from the eeprom
- *
- * hw - Struct containing variables accessed by shared code
- * index - Offset of eeprom word
- *
- * Returns:
- * Word at indexed offset in eeprom, if valid, 0 otherwise.
- ******************************************************************************/
-uint16_t
-ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index)
-{
-
- if ((index < IXGB_EEPROM_SIZE) &&
- (ixgb_check_and_get_eeprom_data (hw) == TRUE)) {
- return(hw->eeprom[index]);
- }
-
- return(0);
-}
-
-
-/******************************************************************************
- * return the mac address from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
- *
- * Returns: None.
- ******************************************************************************/
-void
-ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
- uint8_t *mac_addr)
-{
- int i;
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- DEBUGFUNC("ixgb_get_ee_mac_addr");
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE) {
- for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
- mac_addr[i] = ee_map->mac_addr[i];
- DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]);
- }
- }
-}
-
-/******************************************************************************
- * return the compatibility flags from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * compatibility flags if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_compatibility(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->compatibility);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Printed Board Assembly number from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * PBA number if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint32_t
-ixgb_get_ee_pba_number(struct ixgb_hw *hw)
-{
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return ( le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
- | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16));
-
- return(0);
-}
-
-/******************************************************************************
- * return the Initialization Control Word 1 from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * Initialization Control Word 1 if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->init_ctrl_reg_1);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Initialization Control Word 2 from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * Initialization Control Word 2 if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->init_ctrl_reg_2);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Subsystem Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * Subsystem Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_subsystem_id(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->subsystem_id);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Sub Vendor Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * Sub Vendor Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_subvendor_id(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->subvendor_id);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Device Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * Device Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_device_id(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->device_id);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Vendor Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * Device Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_vendor_id(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->vendor_id);
-
- return(0);
-}
-
-/******************************************************************************
- * return the Software Defined Pins Register from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * SDP Register if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->swdpins_reg);
-
- return(0);
-}
-
-/******************************************************************************
- * return the D3 Power Management Bits from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * D3 Power Management Bits if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint8_t
-ixgb_get_ee_d3_power(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->d3_power);
-
- return(0);
-}
-
-/******************************************************************************
- * return the D0 Power Management Bits from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- * D0 Power Management Bits if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint8_t
-ixgb_get_ee_d0_power(struct ixgb_hw *hw)
-{
- struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
-
- if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
- return(ee_map->d0_power);
-
- return(0);
-}
Index: sys/dev/ixgb/ixgb_hw.h
===================================================================
--- sys/dev/ixgb/ixgb_hw.h
+++ sys/dev/ixgb/ixgb_hw.h
@@ -1,858 +0,0 @@
-/*******************************************************************************
- SPDX-License-Identifier: BSD-3-Clause
-
- Copyright (c) 2001-2004, Intel Corporation
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-/*$FreeBSD$*/
-#ifndef _IXGB_HW_H_
-#define _IXGB_HW_H_
-
-#include <dev/ixgb/if_ixgb_osdep.h>
-
-/* Enums */
-typedef enum {
- ixgb_mac_unknown = 0,
- ixgb_82597,
- ixgb_num_macs
-} ixgb_mac_type;
-
-/* Types of physical layer modules */
-typedef enum {
- ixgb_phy_type_unknown = 0,
- ixgb_phy_type_g6005, /* 850nm, MM fiber, XPAK transceiver */
- ixgb_phy_type_g6104, /* 1310nm, SM fiber, XPAK transceiver */
- ixgb_phy_type_txn17201, /* 850nm, MM fiber, XPAK transceiver */
- ixgb_phy_type_txn17401 /* 1310nm, SM fiber, XENPAK transceiver */
-} ixgb_phy_type;
-
-/* XPAK transceiver vendors, for the SR adapters */
-typedef enum {
- ixgb_xpak_vendor_intel,
- ixgb_xpak_vendor_infineon
-} ixgb_xpak_vendor;
-
-/* Media Types */
-typedef enum {
- ixgb_media_type_unknown = 0,
- ixgb_media_type_fiber = 1,
- ixgb_num_media_types
-} ixgb_media_type;
-
-/* Flow Control Settings */
-typedef enum {
- ixgb_fc_none = 0,
- ixgb_fc_rx_pause = 1,
- ixgb_fc_tx_pause = 2,
- ixgb_fc_full = 3,
- ixgb_fc_default = 0xFF
-} ixgb_fc_type;
-
-/* PCI bus types */
-typedef enum {
- ixgb_bus_type_unknown = 0,
- ixgb_bus_type_pci,
- ixgb_bus_type_pcix
-} ixgb_bus_type;
-
-/* PCI bus speeds */
-typedef enum {
- ixgb_bus_speed_unknown = 0,
- ixgb_bus_speed_33,
- ixgb_bus_speed_66,
- ixgb_bus_speed_100,
- ixgb_bus_speed_133,
- ixgb_bus_speed_reserved
-} ixgb_bus_speed;
-
-/* PCI bus widths */
-typedef enum {
- ixgb_bus_width_unknown = 0,
- ixgb_bus_width_32,
- ixgb_bus_width_64
-} ixgb_bus_width;
-
-
-#define IXGB_ETH_LENGTH_OF_ADDRESS 6
-
-#define IXGB_EEPROM_SIZE 64 /* Size in words */
-
-#define SPEED_10000 10000
-#define FULL_DUPLEX 2
-
-#define MIN_NUMBER_OF_DESCRIPTORS 8
-#define MAX_NUMBER_OF_DESCRIPTORS 0xFFF8 /* 13 bits in RDLEN/TDLEN, 128B aligned */
-
-#define IXGB_DELAY_BEFORE_RESET 10 /* allow 10ms after idling rx/tx units */
-#define IXGB_DELAY_AFTER_RESET 1 /* allow 1ms after the reset */
-#define IXGB_DELAY_AFTER_EE_RESET 10 /* allow 10ms after the EEPROM reset */
-
-#define IXGB_DELAY_USECS_AFTER_LINK_RESET 13 /* allow 13 microseconds after the reset */
- /* NOTE: this is MICROSECONDS */
-#define MAX_RESET_ITERATIONS 8 /* number of iterations to get things right */
-
-/* General Registers */
-#define IXGB_CTRL0 0x00000 /* Device Control Register 0 - RW */
-#define IXGB_CTRL1 0x00008 /* Device Control Register 1 - RW */
-#define IXGB_STATUS 0x00010 /* Device Status Register - RO */
-#define IXGB_EECD 0x00018 /* EEPROM/Flash Control/Data Register - RW */
-#define IXGB_MFS 0x00020 /* Maximum Frame Size - RW */
-
-/* Interrupt */
-#define IXGB_ICR 0x00080 /* Interrupt Cause Read - R/clr */
-#define IXGB_ICS 0x00088 /* Interrupt Cause Set - RW */
-#define IXGB_IMS 0x00090 /* Interrupt Mask Set/Read - RW */
-#define IXGB_IMC 0x00098 /* Interrupt Mask Clear - WO */
-
-/* Receive */
-#define IXGB_RCTL 0x00100 /* RX Control - RW */
-#define IXGB_FCRTL 0x00108 /* Flow Control Receive Threshold Low - RW */
-#define IXGB_FCRTH 0x00110 /* Flow Control Receive Threshold High - RW */
-#define IXGB_RDBAL 0x00118 /* RX Descriptor Base Low - RW */
-#define IXGB_RDBAH 0x0011C /* RX Descriptor Base High - RW */
-#define IXGB_RDLEN 0x00120 /* RX Descriptor Length - RW */
-#define IXGB_RDH 0x00128 /* RX Descriptor Head - RW */
-#define IXGB_RDT 0x00130 /* RX Descriptor Tail - RW */
-#define IXGB_RDTR 0x00138 /* RX Delay Timer Ring - RW */
-#define IXGB_RXDCTL 0x00140 /* Receive Descriptor Control - RW */
-#define IXGB_RAIDC 0x00148 /* Receive Adaptive Interrupt Delay Control - RW */
-#define IXGB_RXCSUM 0x00158 /* Receive Checksum Control - RW */
-#define IXGB_RA 0x00180 /* Receive Address Array Base - RW */
-#define IXGB_RAL 0x00180 /* Receive Address Low [0:15] - RW */
-#define IXGB_RAH 0x00184 /* Receive Address High [0:15] - RW */
-#define IXGB_MTA 0x00200 /* Multicast Table Array [0:127] - RW */
-#define IXGB_VFTA 0x00400 /* VLAN Filter Table Array [0:127] - RW */
-#define IXGB_REQ_RX_DESCRIPTOR_MULTIPLE 8
-
-/* Transmit */
-#define IXGB_TCTL 0x00600 /* TX Control - RW */
-#define IXGB_TDBAL 0x00608 /* TX Descriptor Base Low - RW */
-#define IXGB_TDBAH 0x0060C /* TX Descriptor Base High - RW */
-#define IXGB_TDLEN 0x00610 /* TX Descriptor Length - RW */
-#define IXGB_TDH 0x00618 /* TX Descriptor Head - RW */
-#define IXGB_TDT 0x00620 /* TX Descriptor Tail - RW */
-#define IXGB_TIDV 0x00628 /* TX Interrupt Delay Value - RW */
-#define IXGB_TXDCTL 0x00630 /* Transmit Descriptor Control - RW */
-#define IXGB_TSPMT 0x00638 /* TCP Segmentation PAD & Min Threshold - RW */
-#define IXGB_PAP 0x00640 /* Pause and Pace - RW */
-#define IXGB_REQ_TX_DESCRIPTOR_MULTIPLE 8
-
-/* Physical */
-#define IXGB_PCSC1 0x00700 /* PCS Control 1 - RW */
-#define IXGB_PCSC2 0x00708 /* PCS Control 2 - RW */
-#define IXGB_PCSS1 0x00710 /* PCS Status 1 - RO */
-#define IXGB_PCSS2 0x00718 /* PCS Status 2 - RO */
-#define IXGB_XPCSS 0x00720 /* 10GBASE-X PCS Status (or XGXS Lane Status) - RO */
-#define IXGB_UCCR 0x00728 /* Unilink Circuit Control Register */
-#define IXGB_XPCSTC 0x00730 /* 10GBASE-X PCS Test Control */
-#define IXGB_MACA 0x00738 /* MDI Autoscan Command and Address - RW */
-#define IXGB_APAE 0x00740 /* Autoscan PHY Address Enable - RW */
-#define IXGB_ARD 0x00748 /* Autoscan Read Data - RO */
-#define IXGB_AIS 0x00750 /* Autoscan Interrupt Status - RO */
-#define IXGB_MSCA 0x00758 /* MDI Single Command and Address - RW */
-#define IXGB_MSRWD 0x00760 /* MDI Single Read and Write Data - RW, RO */
-
-/* Wake-up */
-#define IXGB_WUFC 0x00808 /* Wake Up Filter Control - RW */
-#define IXGB_WUS 0x00810 /* Wake Up Status - RO */
-#define IXGB_FFLT 0x01000 /* Flexible Filter Length Table - RW */
-#define IXGB_FFMT 0x01020 /* Flexible Filter Mask Table - RW */
-#define IXGB_FTVT 0x01420 /* Flexible Filter Value Table - RW */
-
-/* Statistics */
-#define IXGB_TPRL 0x02000 /* Total Packets Received (Low) */
-#define IXGB_TPRH 0x02004 /* Total Packets Received (High) */
-#define IXGB_GPRCL 0x02008 /* Good Packets Received Count (Low) */
-#define IXGB_GPRCH 0x0200C /* Good Packets Received Count (High) */
-#define IXGB_BPRCL 0x02010 /* Broadcast Packets Received Count (Low) */
-#define IXGB_BPRCH 0x02014 /* Broadcast Packets Received Count (High) */
-#define IXGB_MPRCL 0x02018 /* Multicast Packets Received Count (Low) */
-#define IXGB_MPRCH 0x0201C /* Multicast Packets Received Count (High) */
-#define IXGB_UPRCL 0x02020 /* Unicast Packets Received Count (Low) */
-#define IXGB_UPRCH 0x02024 /* Unicast Packets Received Count (High) */
-#define IXGB_VPRCL 0x02028 /* VLAN Packets Received Count (Low) */
-#define IXGB_VPRCH 0x0202C /* VLAN Packets Received Count (High) */
-#define IXGB_JPRCL 0x02030 /* Jumbo Packets Received Count (Low) */
-#define IXGB_JPRCH 0x02034 /* Jumbo Packets Received Count (High) */
-#define IXGB_GORCL 0x02038 /* Good Octets Received Count (Low) */
-#define IXGB_GORCH 0x0203C /* Good Octets Received Count (High) */
-#define IXGB_TORL 0x02040 /* Total Octets Received (Low) */
-#define IXGB_TORH 0x02044 /* Total Octets Received (High) */
-#define IXGB_RNBC 0x02048 /* Receive No Buffers Count */
-#define IXGB_RUC 0x02050 /* Receive Undersize Count */
-#define IXGB_ROC 0x02058 /* Receive Oversize Count */
-#define IXGB_RLEC 0x02060 /* Receive Length Error Count */
-#define IXGB_CRCERRS 0x02068 /* CRC Error Count */
-#define IXGB_ICBC 0x02070 /* Illegal control byte in mid-packet Count */
-#define IXGB_ECBC 0x02078 /* Error Control byte in mid-packet Count */
-#define IXGB_MPC 0x02080 /* Missed Packets Count */
-#define IXGB_TPTL 0x02100 /* Total Packets Transmitted (Low) */
-#define IXGB_TPTH 0x02104 /* Total Packets Transmitted (High) */
-#define IXGB_GPTCL 0x02108 /* Good Packets Transmitted Count (Low) */
-#define IXGB_GPTCH 0x0210C /* Good Packets Transmitted Count (High) */
-#define IXGB_BPTCL 0x02110 /* Broadcast Packets Transmitted Count (Low) */
-#define IXGB_BPTCH 0x02114 /* Broadcast Packets Transmitted Count (High) */
-#define IXGB_MPTCL 0x02118 /* Multicast Packets Transmitted Count (Low) */
-#define IXGB_MPTCH 0x0211C /* Multicast Packets Transmitted Count (High) */
-#define IXGB_UPTCL 0x02120 /* Unicast Packets Transmitted Count (Low) */
-#define IXGB_UPTCH 0x02124 /* Unicast Packets Transmitted Count (High) */
-#define IXGB_VPTCL 0x02128 /* VLAN Packets Transmitted Count (Low) */
-#define IXGB_VPTCH 0x0212C /* VLAN Packets Transmitted Count (High) */
-#define IXGB_JPTCL 0x02130 /* Jumbo Packets Transmitted Count (Low) */
-#define IXGB_JPTCH 0x02134 /* Jumbo Packets Transmitted Count (High) */
-#define IXGB_GOTCL 0x02138 /* Good Octets Transmitted Count (Low) */
-#define IXGB_GOTCH 0x0213C /* Good Octets Transmitted Count (High) */
-#define IXGB_TOTL 0x02140 /* Total Octets Transmitted Count (Low) */
-#define IXGB_TOTH 0x02144 /* Total Octets Transmitted Count (High) */
-#define IXGB_DC 0x02148 /* Defer Count */
-#define IXGB_PLT64C 0x02150 /* Packet Transmitted was less than 64 bytes Count */
-#define IXGB_TSCTC 0x02170 /* TCP Segmentation Context Transmitted Count */
-#define IXGB_TSCTFC 0x02178 /* TCP Segmentation Context Tx Fail Count */
-#define IXGB_IBIC 0x02180 /* Illegal byte during Idle stream count */
-#define IXGB_RFC 0x02188 /* Remote Fault Count */
-#define IXGB_LFC 0x02190 /* Local Fault Count */
-#define IXGB_PFRC 0x02198 /* Pause Frame Receive Count */
-#define IXGB_PFTC 0x021A0 /* Pause Frame Transmit Count */
-#define IXGB_MCFRC 0x021A8 /* MAC Control Frames (non-Pause) Received Count */
-#define IXGB_MCFTC 0x021B0 /* MAC Control Frames (non-Pause) Transmitted Count */
-#define IXGB_XONRXC 0x021B8 /* XON Received Count */
-#define IXGB_XONTXC 0x021C0 /* XON Transmitted Count */
-#define IXGB_XOFFRXC 0x021C8 /* XOFF Received Count */
-#define IXGB_XOFFTXC 0x021D0 /* XOFF Transmitted Count */
-#define IXGB_RJC 0x021D8 /* Receive Jabber Count */
-
-
-/* CTRL0 Bit Masks */
-#define IXGB_CTRL0_LRST 0x00000008
-#define IXGB_CTRL0_JFE 0x00000010
-#define IXGB_CTRL0_XLE 0x00000020
-#define IXGB_CTRL0_MDCS 0x00000040
-#define IXGB_CTRL0_CMDC 0x00000080
-#define IXGB_CTRL0_SDP0 0x00040000
-#define IXGB_CTRL0_SDP1 0x00080000
-#define IXGB_CTRL0_SDP2 0x00100000
-#define IXGB_CTRL0_SDP3 0x00200000
-#define IXGB_CTRL0_SDP0_DIR 0x00400000
-#define IXGB_CTRL0_SDP1_DIR 0x00800000
-#define IXGB_CTRL0_SDP2_DIR 0x01000000
-#define IXGB_CTRL0_SDP3_DIR 0x02000000
-#define IXGB_CTRL0_RST 0x04000000
-#define IXGB_CTRL0_RPE 0x08000000
-#define IXGB_CTRL0_TPE 0x10000000
-#define IXGB_CTRL0_VME 0x40000000
-
-/* CTRL1 Bit Masks */
-#define IXGB_CTRL1_GPI0_EN 0x00000001
-#define IXGB_CTRL1_GPI1_EN 0x00000002
-#define IXGB_CTRL1_GPI2_EN 0x00000004
-#define IXGB_CTRL1_GPI3_EN 0x00000008
-#define IXGB_CTRL1_SDP4 0x00000010
-#define IXGB_CTRL1_SDP5 0x00000020
-#define IXGB_CTRL1_SDP6 0x00000040
-#define IXGB_CTRL1_SDP7 0x00000080
-#define IXGB_CTRL1_SDP4_DIR 0x00000100
-#define IXGB_CTRL1_SDP5_DIR 0x00000200
-#define IXGB_CTRL1_SDP6_DIR 0x00000400
-#define IXGB_CTRL1_SDP7_DIR 0x00000800
-#define IXGB_CTRL1_EE_RST 0x00002000
-#define IXGB_CTRL1_RO_DIS 0x00020000
-#define IXGB_CTRL1_PCIXHM_MASK 0x00C00000
-#define IXGB_CTRL1_PCIXHM_1_2 0x00000000
-#define IXGB_CTRL1_PCIXHM_5_8 0x00400000
-#define IXGB_CTRL1_PCIXHM_3_4 0x00800000
-#define IXGB_CTRL1_PCIXHM_7_8 0x00C00000
-
-/* STATUS Bit Masks */
-#define IXGB_STATUS_LU 0x00000002
-#define IXGB_STATUS_AIP 0x00000004
-#define IXGB_STATUS_TXOFF 0x00000010
-#define IXGB_STATUS_XAUIME 0x00000020
-#define IXGB_STATUS_RES 0x00000040
-#define IXGB_STATUS_RIS 0x00000080
-#define IXGB_STATUS_RIE 0x00000100
-#define IXGB_STATUS_RLF 0x00000200
-#define IXGB_STATUS_RRF 0x00000400
-#define IXGB_STATUS_PCI_SPD 0x00000800
-#define IXGB_STATUS_BUS64 0x00001000
-#define IXGB_STATUS_PCIX_MODE 0x00002000
-#define IXGB_STATUS_PCIX_SPD_MASK 0x0000C000
-#define IXGB_STATUS_PCIX_SPD_66 0x00000000
-#define IXGB_STATUS_PCIX_SPD_100 0x00004000
-#define IXGB_STATUS_PCIX_SPD_133 0x00008000
-#define IXGB_STATUS_REV_ID_MASK 0x000F0000
-#define IXGB_STATUS_REV_ID_SHIFT 16
-
-/* EECD Bit Masks */
-#define IXGB_EECD_SK 0x00000001
-#define IXGB_EECD_CS 0x00000002
-#define IXGB_EECD_DI 0x00000004
-#define IXGB_EECD_DO 0x00000008
-#define IXGB_EECD_FWE_MASK 0x00000030
-#define IXGB_EECD_FWE_DIS 0x00000010
-#define IXGB_EECD_FWE_EN 0x00000020
-
-/* MFS */
-#define IXGB_MFS_SHIFT 16
-
-/* Interrupt Register Bit Masks (used for ICR, ICS, IMS, and IMC) */
-#define IXGB_INT_TXDW 0x00000001
-#define IXGB_INT_TXQE 0x00000002
-#define IXGB_INT_LSC 0x00000004
-#define IXGB_INT_RXSEQ 0x00000008
-#define IXGB_INT_RXDMT0 0x00000010
-#define IXGB_INT_RXO 0x00000040
-#define IXGB_INT_RXT0 0x00000080
-#define IXGB_INT_AUTOSCAN 0x00000200
-#define IXGB_INT_GPI0 0x00000800
-#define IXGB_INT_GPI1 0x00001000
-#define IXGB_INT_GPI2 0x00002000
-#define IXGB_INT_GPI3 0x00004000
-
-/* RCTL Bit Masks */
-#define IXGB_RCTL_RXEN 0x00000002
-#define IXGB_RCTL_SBP 0x00000004
-#define IXGB_RCTL_UPE 0x00000008
-#define IXGB_RCTL_MPE 0x00000010
-#define IXGB_RCTL_RDMTS_MASK 0x00000300
-#define IXGB_RCTL_RDMTS_1_2 0x00000000
-#define IXGB_RCTL_RDMTS_1_4 0x00000100
-#define IXGB_RCTL_RDMTS_1_8 0x00000200
-#define IXGB_RCTL_MO_MASK 0x00003000
-#define IXGB_RCTL_MO_47_36 0x00000000
-#define IXGB_RCTL_MO_46_35 0x00001000
-#define IXGB_RCTL_MO_45_34 0x00002000
-#define IXGB_RCTL_MO_43_32 0x00003000
-#define IXGB_RCTL_MO_SHIFT 12
-#define IXGB_RCTL_BAM 0x00008000
-#define IXGB_RCTL_BSIZE_MASK 0x00030000
-#define IXGB_RCTL_BSIZE_2048 0x00000000
-#define IXGB_RCTL_BSIZE_4096 0x00010000
-#define IXGB_RCTL_BSIZE_8192 0x00020000
-#define IXGB_RCTL_BSIZE_16384 0x00030000
-#define IXGB_RCTL_VFE 0x00040000
-#define IXGB_RCTL_CFIEN 0x00080000
-#define IXGB_RCTL_CFI 0x00100000
-#define IXGB_RCTL_RPDA_MASK 0x00600000
-#define IXGB_RCTL_RPDA_MC_MAC 0x00000000
-#define IXGB_RCTL_MC_ONLY 0x00400000
-#define IXGB_RCTL_CFF 0x00800000
-#define IXGB_RCTL_SECRC 0x04000000
-#define IXGB_RDT_FPDB 0x80000000
-
-#define IXGB_RCTL_IDLE_RX_UNIT 0
-
-/* FCRTL Bit Masks */
-#define IXGB_FCRTL_XONE 0x80000000
-
-/* RXDCTL Bit Masks */
-#define IXGB_RXDCTL_PTHRESH_MASK 0x000001FF
-#define IXGB_RXDCTL_PTHRESH_SHIFT 0
-#define IXGB_RXDCTL_HTHRESH_MASK 0x0003FE00
-#define IXGB_RXDCTL_HTHRESH_SHIFT 9
-#define IXGB_RXDCTL_WTHRESH_MASK 0x07FC0000
-#define IXGB_RXDCTL_WTHRESH_SHIFT 18
-
-/* RAIDC Bit Masks */
-#define IXGB_RAIDC_HIGHTHRS_MASK 0x0000003F
-#define IXGB_RAIDC_DELAY_MASK 0x000FF800
-#define IXGB_RAIDC_DELAY_SHIFT 11
-#define IXGB_RAIDC_POLL_MASK 0x1FF00000
-#define IXGB_RAIDC_POLL_SHIFT 20
-#define IXGB_RAIDC_RXT_GATE 0x40000000
-#define IXGB_RAIDC_EN 0x80000000
-
-#define IXGB_RAIDC_POLL_1000_INTERRUPTS_PER_SECOND 1220
-#define IXGB_RAIDC_POLL_5000_INTERRUPTS_PER_SECOND 244
-#define IXGB_RAIDC_POLL_10000_INTERRUPTS_PER_SECOND 122
-#define IXGB_RAIDC_POLL_20000_INTERRUPTS_PER_SECOND 61
-
-/* RXCSUM Bit Masks */
-#define IXGB_RXCSUM_IPOFL 0x00000100
-#define IXGB_RXCSUM_TUOFL 0x00000200
-
-/* RAH Bit Masks */
-#define IXGB_RAH_ASEL_MASK 0x00030000
-#define IXGB_RAH_ASEL_DEST 0x00000000
-#define IXGB_RAH_ASEL_SRC 0x00010000
-#define IXGB_RAH_AV 0x80000000
-
-/* TCTL Bit Masks */
-#define IXGB_TCTL_TCE 0x00000001
-#define IXGB_TCTL_TXEN 0x00000002
-#define IXGB_TCTL_TPDE 0x00000004
-
-#define IXGB_TCTL_IDLE_TX_UNIT 0
-
-/* TXDCTL Bit Masks */
-#define IXGB_TXDCTL_PTHRESH_MASK 0x0000007F
-#define IXGB_TXDCTL_HTHRESH_MASK 0x00007F00
-#define IXGB_TXDCTL_HTHRESH_SHIFT 8
-#define IXGB_TXDCTL_WTHRESH_MASK 0x007F0000
-#define IXGB_TXDCTL_WTHRESH_SHIFT 16
-
-/* TSPMT Bit Masks */
-#define IXGB_TSPMT_TSMT_MASK 0x0000FFFF
-#define IXGB_TSPMT_TSPBP_MASK 0xFFFF0000
-#define IXGB_TSPMT_TSPBP_SHIFT 16
-
-/* PAP Bit Masks */
-#define IXGB_PAP_TXPC_MASK 0x0000FFFF
-#define IXGB_PAP_TXPV_MASK 0x000F0000
-#define IXGB_PAP_TXPV_10G 0x00000000
-#define IXGB_PAP_TXPV_1G 0x00010000
-#define IXGB_PAP_TXPV_2G 0x00020000
-#define IXGB_PAP_TXPV_3G 0x00030000
-#define IXGB_PAP_TXPV_4G 0x00040000
-#define IXGB_PAP_TXPV_5G 0x00050000
-#define IXGB_PAP_TXPV_6G 0x00060000
-#define IXGB_PAP_TXPV_7G 0x00070000
-#define IXGB_PAP_TXPV_8G 0x00080000
-#define IXGB_PAP_TXPV_9G 0x00090000
-#define IXGB_PAP_TXPV_WAN 0x000F0000
-
-/* PCSC1 Bit Masks */
-#define IXGB_PCSC1_LOOPBACK 0x00004000
-
-/* PCSC2 Bit Masks */
-#define IXGB_PCSC2_PCS_TYPE_MASK 0x00000003
-#define IXGB_PCSC2_PCS_TYPE_10GBX 0x00000001
-
-/* PCSS1 Bit Masks */
-#define IXGB_PCSS1_LOCAL_FAULT 0x00000080
-#define IXGB_PCSS1_RX_LINK_STATUS 0x00000004
-
-/* PCSS2 Bit Masks */
-#define IXGB_PCSS2_DEV_PRES_MASK 0x0000C000
-#define IXGB_PCSS2_DEV_PRES 0x00004000
-#define IXGB_PCSS2_TX_LF 0x00000800
-#define IXGB_PCSS2_RX_LF 0x00000400
-#define IXGB_PCSS2_10GBW 0x00000004
-#define IXGB_PCSS2_10GBX 0x00000002
-#define IXGB_PCSS2_10GBR 0x00000001
-
-/* XPCSS Bit Masks */
-#define IXGB_XPCSS_ALIGN_STATUS 0x00001000
-#define IXGB_XPCSS_PATTERN_TEST 0x00000800
-#define IXGB_XPCSS_LANE_3_SYNC 0x00000008
-#define IXGB_XPCSS_LANE_2_SYNC 0x00000004
-#define IXGB_XPCSS_LANE_1_SYNC 0x00000002
-#define IXGB_XPCSS_LANE_0_SYNC 0x00000001
-
-/* XPCSTC Bit Masks */
-#define IXGB_XPCSTC_BERT_TRIG 0x00200000
-#define IXGB_XPCSTC_BERT_SST 0x00100000
-#define IXGB_XPCSTC_BERT_PSZ_MASK 0x000C0000
-#define IXGB_XPCSTC_BERT_PSZ_SHIFT 17
-#define IXGB_XPCSTC_BERT_PSZ_INF 0x00000003
-#define IXGB_XPCSTC_BERT_PSZ_68 0x00000001
-#define IXGB_XPCSTC_BERT_PSZ_1028 0x00000000
-
-/* MSCA bit Masks */
-/* New Protocol Address */
-#define IXGB_MSCA_NP_ADDR_MASK 0x0000FFFF
-#define IXGB_MSCA_NP_ADDR_SHIFT 0
-/* Either Device Type or Register Address,depending on ST_CODE */
-#define IXGB_MSCA_DEV_TYPE_MASK 0x001F0000
-#define IXGB_MSCA_DEV_TYPE_SHIFT 16
-#define IXGB_MSCA_PHY_ADDR_MASK 0x03E00000
-#define IXGB_MSCA_PHY_ADDR_SHIFT 21
-#define IXGB_MSCA_OP_CODE_MASK 0x0C000000
-/* OP_CODE == 00, Address cycle, New Protocol */
-/* OP_CODE == 01, Write operation */
-/* OP_CODE == 10, Read operation */
-/* OP_CODE == 11, Read, auto increment, New Protocol */
-#define IXGB_MSCA_ADDR_CYCLE 0x00000000
-#define IXGB_MSCA_WRITE 0x04000000
-#define IXGB_MSCA_READ 0x08000000
-#define IXGB_MSCA_READ_AUTOINC 0x0C000000
-#define IXGB_MSCA_OP_CODE_SHIFT 26
-#define IXGB_MSCA_ST_CODE_MASK 0x30000000
-/* ST_CODE == 00, New Protocol */
-/* ST_CODE == 01, Old Protocol */
-#define IXGB_MSCA_NEW_PROTOCOL 0x00000000
-#define IXGB_MSCA_OLD_PROTOCOL 0x10000000
-#define IXGB_MSCA_ST_CODE_SHIFT 28
-/* Initiate command, self-clearing when command completes */
-#define IXGB_MSCA_MDI_COMMAND 0x40000000
-/*MDI In Progress Enable. */
-#define IXGB_MSCA_MDI_IN_PROG_EN 0x80000000
-
-/* MSRWD bit masks */
-#define IXGB_MSRWD_WRITE_DATA_MASK 0x0000FFFF
-#define IXGB_MSRWD_WRITE_DATA_SHIFT 0
-#define IXGB_MSRWD_READ_DATA_MASK 0xFFFF0000
-#define IXGB_MSRWD_READ_DATA_SHIFT 16
-
-/* Definitions for the optics devices on the MDIO bus. */
-#define IXGB_PHY_ADDRESS 0x0 /* Single PHY, multiple "Devices" */
-
-/* Standard five-bit Device IDs. See IEEE 802.3ae, clause 45 */
-#define MDIO_PMA_PMD_DID 0x01
-#define MDIO_WIS_DID 0x02
-#define MDIO_PCS_DID 0x03
-#define MDIO_XGXS_DID 0x04
-
-/* Standard PMA/PMD registers and bit definitions. */
-/* Note: This is a very limited set of definitions, */
-/* only implemented features are defined. */
-#define MDIO_PMA_PMD_CR1 0x0000
-#define MDIO_PMA_PMD_CR1_RESET 0x8000
-
-#define MDIO_PMA_PMD_XPAK_VENDOR_NAME 0x803A /* XPAK/XENPAK devices only */
-
-/* Vendor-specific MDIO registers */
-#define G6XXX_PMA_PMD_VS1 0xC001 /* Vendor-specific register */
-#define G6XXX_XGXS_XAUI_VS2 0x18 /* Vendor-specific register */
-
-#define G6XXX_PMA_PMD_VS1_PLL_RESET 0x80
-#define G6XXX_PMA_PMD_VS1_REMOVE_PLL_RESET 0x00
-#define G6XXX_XGXS_XAUI_VS2_INPUT_MASK 0x0F /* XAUI lanes synchronized */
-
-/* Layout of a single receive descriptor. The controller assumes that this
- * structure is packed into 16 bytes, which is a safe assumption with most
- * compilers. However, some compilers may insert padding between the fields,
- * in which case the structure must be packed in some compiler-specific
- * manner. */
-struct ixgb_rx_desc {
- uint64_t buff_addr;
- uint16_t length;
- uint16_t reserved;
- uint8_t status;
- uint8_t errors;
- uint16_t special;
-};
-
-#define IXGB_RX_DESC_STATUS_DD 0x01
-#define IXGB_RX_DESC_STATUS_EOP 0x02
-#define IXGB_RX_DESC_STATUS_IXSM 0x04
-#define IXGB_RX_DESC_STATUS_VP 0x08
-#define IXGB_RX_DESC_STATUS_TCPCS 0x20
-#define IXGB_RX_DESC_STATUS_IPCS 0x40
-#define IXGB_RX_DESC_STATUS_PIF 0x80
-
-#define IXGB_RX_DESC_ERRORS_CE 0x01
-#define IXGB_RX_DESC_ERRORS_SE 0x02
-#define IXGB_RX_DESC_ERRORS_P 0x08
-#define IXGB_RX_DESC_ERRORS_TCPE 0x20
-#define IXGB_RX_DESC_ERRORS_IPE 0x40
-#define IXGB_RX_DESC_ERRORS_RXE 0x80
-
-#define IXGB_RX_DESC_SPECIAL_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */
-#define IXGB_RX_DESC_SPECIAL_PRI_MASK 0xE000 /* Priority is in upper 3 bits */
-#define IXGB_RX_DESC_SPECIAL_PRI_SHIFT 0x000D /* Priority is in upper 3 of 16 */
-
-/* Layout of a single transmit descriptor. The controller assumes that this
- * structure is packed into 16 bytes, which is a safe assumption with most
- * compilers. However, some compilers may insert padding between the fields,
- * in which case the structure must be packed in some compiler-specific
- * manner. */
-struct ixgb_tx_desc {
- uint64_t buff_addr;
- uint32_t cmd_type_len;
- uint8_t status;
- uint8_t popts;
- uint16_t vlan;
-};
-
-#define IXGB_TX_DESC_LENGTH_MASK 0x000FFFFF
-#define IXGB_TX_DESC_TYPE_MASK 0x00F00000
-#define IXGB_TX_DESC_TYPE_SHIFT 20
-#define IXGB_TX_DESC_CMD_MASK 0xFF000000
-#define IXGB_TX_DESC_CMD_SHIFT 24
-#define IXGB_TX_DESC_CMD_EOP 0x01000000
-#define IXGB_TX_DESC_CMD_TSE 0x04000000
-#define IXGB_TX_DESC_CMD_RS 0x08000000
-#define IXGB_TX_DESC_CMD_VLE 0x40000000
-#define IXGB_TX_DESC_CMD_IDE 0x80000000
-
-#define IXGB_TX_DESC_TYPE 0x00100000
-
-#define IXGB_TX_DESC_STATUS_DD 0x01
-
-#define IXGB_TX_DESC_POPTS_IXSM 0x01
-#define IXGB_TX_DESC_POPTS_TXSM 0x02
-#define IXGB_TX_DESC_SPECIAL_PRI_SHIFT IXGB_RX_DESC_SPECIAL_PRI_SHIFT /* Priority is in upper 3 of 16 */
-
-struct ixgb_context_desc {
- uint8_t ipcss;
- uint8_t ipcso;
- uint16_t ipcse;
- uint8_t tucss;
- uint8_t tucso;
- uint16_t tucse;
- uint32_t cmd_type_len;
- uint8_t status;
- uint8_t hdr_len;
- uint16_t mss;
-};
-
-#define IXGB_CONTEXT_DESC_CMD_TCP 0x01000000
-#define IXGB_CONTEXT_DESC_CMD_IP 0x02000000
-#define IXGB_CONTEXT_DESC_CMD_TSE 0x04000000
-#define IXGB_CONTEXT_DESC_CMD_RS 0x08000000
-#define IXGB_CONTEXT_DESC_CMD_IDE 0x80000000
-
-#define IXGB_CONTEXT_DESC_TYPE 0x00000000
-
-#define IXGB_CONTEXT_DESC_STATUS_DD 0x01
-
-/* Filters */
-#define IXGB_RAR_ENTRIES 16 /* Number of entries in Rx Address array */
-#define IXGB_MC_TBL_SIZE 128 /* Multicast Filter Table (4096 bits) */
-#define IXGB_VLAN_FILTER_TBL_SIZE 128 /* VLAN Filter Table (4096 bits) */
-
-#define IXGB_MEMORY_REGISTER_BASE_ADDRESS 0
-#define ENET_HEADER_SIZE 14
-#define ENET_FCS_LENGTH 4
-#define IXGB_MAX_NUM_MULTICAST_ADDRESSES 128
-#define IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS 60
-#define IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS 1514
-#define IXGB_MAX_JUMBO_FRAME_SIZE 0x3F00
-
-/* Phy Addresses */
-#define IXGB_OPTICAL_PHY_ADDR 0x0 /* Optical Module phy address*/
-#define IXGB_XAUII_PHY_ADDR 0x1 /* Xauii transceiver phy address*/
-#define IXGB_DIAG_PHY_ADDR 0x1F/* Diagnostic Device phy address*/
-
-/* This structure takes a 64k flash and maps it for identification commands */
-struct ixgb_flash_buffer {
- uint8_t manufacturer_id;
- uint8_t device_id;
- uint8_t filler1[0x2AA8];
- uint8_t cmd2;
- uint8_t filler2[0x2AAA];
- uint8_t cmd1;
- uint8_t filler3[0xAAAA];
-};
-
-/*
- * This is a little-endian specific check.
- */
-#define IS_MULTICAST(Address) \
- (boolean_t)(((uint8_t *)(Address))[0] & ((uint8_t)0x01))
-
-
-/*
- * Check whether an address is broadcast.
- */
-#define IS_BROADCAST(Address) \
- ((((uint8_t *)(Address))[0] == ((uint8_t)0xff)) && (((uint8_t *)(Address))[1] == ((uint8_t)0xff)))
-
-/* Flow control parameters */
-struct ixgb_fc {
- uint32_t high_water; /* Flow Control High-water */
- uint32_t low_water; /* Flow Control Low-water */
- uint16_t pause_time; /* Flow Control Pause timer */
- boolean_t send_xon; /* Flow control send XON */
- ixgb_fc_type type; /* Type of flow control */
-};
-
-/* The historical defaults for the flow control values are given below. */
-#define FC_DEFAULT_HI_THRESH (0x8000) /* 32KB */
-#define FC_DEFAULT_LO_THRESH (0x4000) /* 16KB */
-#define FC_DEFAULT_TX_TIMER (0x100) /* ~130 us */
-
-/* Phy definitions */
-#define IXGB_MAX_PHY_REG_ADDRESS 0xFFFF
-#define IXGB_MAX_PHY_ADDRESS 31
-#define IXGB_MAX_PHY_DEV_TYPE 31
-
-/* Bus parameters */
-struct ixgb_bus {
- ixgb_bus_speed speed;
- ixgb_bus_width width;
- ixgb_bus_type type;
-};
-
-struct ixgb_hw {
- uint8_t *hw_addr; /* Base Address of the hardware */
- void *back; /* Pointer to OS-dependent struct */
- struct ixgb_fc fc; /* Flow control parameters */
- struct ixgb_bus bus; /* Bus parameters */
- uint32_t phy_id; /* Phy Identifier */
- uint32_t phy_addr; /* XGMII address of Phy */
- ixgb_mac_type mac_type; /* Identifier for MAC controller */
- ixgb_phy_type phy_type; /* Transceiver/phy identifier */
- uint32_t max_frame_size; /* Maximum frame size supported */
- uint32_t mc_filter_type; /* Multicast filter hash type */
- uint32_t num_mc_addrs; /* Number of current Multicast addrs*/
- uint8_t curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS]; /* Individual address currently programmed in MAC */
- uint32_t num_tx_desc; /* Number of Transmit descriptors */
- uint32_t num_rx_desc; /* Number of Receive descriptors */
- uint32_t rx_buffer_size; /* Size of Receive buffer */
- boolean_t link_up; /* TRUE if link is valid */
- boolean_t adapter_stopped; /* State of adapter */
- uint16_t device_id; /* device id from PCI configuration space */
- uint16_t vendor_id; /* vendor id from PCI configuration space */
- uint8_t revision_id; /* revision id from PCI configuration space */
- uint16_t subsystem_vendor_id;/* subsystem vendor id from PCI configuration space */
- uint16_t subsystem_id; /* subsystem id from PCI configuration space */
- uint32_t bar0; /* Base Address registers */
- uint32_t bar1;
- uint32_t bar2;
- uint32_t bar3;
- uint16_t pci_cmd_word; /* PCI command register id from PCI configuration space */
- uint16_t eeprom[IXGB_EEPROM_SIZE]; /* EEPROM contents read at init time */
- unsigned long io_base; /* Our I/O mapped location */
- uint32_t lastLFC;
- uint32_t lastRFC;
-};
-
-/* Statistics reported by the hardware */
-struct ixgb_hw_stats {
- uint64_t tprl;
- uint64_t tprh;
- uint64_t gprcl;
- uint64_t gprch;
- uint64_t bprcl;
- uint64_t bprch;
- uint64_t mprcl;
- uint64_t mprch;
- uint64_t uprcl;
- uint64_t uprch;
- uint64_t vprcl;
- uint64_t vprch;
- uint64_t jprcl;
- uint64_t jprch;
- uint64_t gorcl;
- uint64_t gorch;
- uint64_t torl;
- uint64_t torh;
- uint64_t rnbc;
- uint64_t ruc;
- uint64_t roc;
- uint64_t rlec;
- uint64_t crcerrs;
- uint64_t icbc;
- uint64_t ecbc;
- uint64_t mpc;
- uint64_t tptl;
- uint64_t tpth;
- uint64_t gptcl;
- uint64_t gptch;
- uint64_t bptcl;
- uint64_t bptch;
- uint64_t mptcl;
- uint64_t mptch;
- uint64_t uptcl;
- uint64_t uptch;
- uint64_t vptcl;
- uint64_t vptch;
- uint64_t jptcl;
- uint64_t jptch;
- uint64_t gotcl;
- uint64_t gotch;
- uint64_t totl;
- uint64_t toth;
- uint64_t dc;
- uint64_t plt64c;
- uint64_t tsctc;
- uint64_t tsctfc;
- uint64_t ibic;
- uint64_t rfc;
- uint64_t lfc;
- uint64_t pfrc;
- uint64_t pftc;
- uint64_t mcfrc;
- uint64_t mcftc;
- uint64_t xonrxc;
- uint64_t xontxc;
- uint64_t xoffrxc;
- uint64_t xofftxc;
- uint64_t rjc;
-};
-
-/* Function Prototypes */
-extern boolean_t ixgb_adapter_stop(struct ixgb_hw *hw);
-extern boolean_t ixgb_init_hw(struct ixgb_hw *hw);
-extern boolean_t ixgb_adapter_start(struct ixgb_hw *hw);
-extern void ixgb_init_rx_addrs(struct ixgb_hw *hw);
-extern void ixgb_check_for_link(struct ixgb_hw *hw);
-extern boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw);
-extern boolean_t ixgb_setup_fc(struct ixgb_hw *hw);
-extern void ixgb_clear_hw_cntrs(struct ixgb_hw *hw);
-extern boolean_t mac_addr_valid(uint8_t *mac_addr);
-
-extern uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_addr,
- uint32_t phy_addr,
- uint32_t device_type);
-
-extern void ixgb_write_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_addr,
- uint32_t phy_addr,
- uint32_t device_type,
- uint16_t data);
-
-extern void ixgb_rar_set(struct ixgb_hw *hw,
- uint8_t *addr,
- uint32_t index);
-
-
-/* Filters (multicast, vlan, receive) */
-extern void ixgb_mc_addr_list_update(struct ixgb_hw *hw,
- uint8_t * mc_addr_list,
- uint32_t mc_addr_count,
- uint32_t pad);
-
-/* Vfta functions */
-extern void ixgb_write_vfta(struct ixgb_hw *hw,
- uint32_t offset,
- uint32_t value);
-
-extern void ixgb_clear_vfta(struct ixgb_hw *hw);
-
-
-/* Access functions to eeprom data */
-void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr);
-uint16_t ixgb_get_ee_compatibility(struct ixgb_hw *hw);
-uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_subsystem_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_subvendor_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_device_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_vendor_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw);
-uint8_t ixgb_get_ee_d3_power(struct ixgb_hw *hw);
-uint8_t ixgb_get_ee_d0_power(struct ixgb_hw *hw);
-boolean_t ixgb_get_eeprom_data(struct ixgb_hw *hw);
-uint16_t ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index);
-
-/* Everything else */
-void ixgb_led_on(struct ixgb_hw *hw);
-void ixgb_led_off(struct ixgb_hw *hw);
-void ixgb_write_pci_cfg(struct ixgb_hw *hw,
- uint32_t reg,
- uint16_t * value);
-
-
-#endif /* _IXGB_HW_H_ */
Index: sys/dev/ixgb/ixgb_hw.c
===================================================================
--- sys/dev/ixgb/ixgb_hw.c
+++ sys/dev/ixgb/ixgb_hw.c
@@ -1,1223 +0,0 @@
-/*******************************************************************************
- SPDX-License-Identifier: BSD-3-Clause
-
- Copyright (c) 2001-2004, Intel Corporation
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-/*$FreeBSD$*/
-
-/* ixgb_hw.c
- * Shared functions for accessing and configuring the adapter
- */
-
-#include <dev/ixgb/ixgb_hw.h>
-#include <dev/ixgb/ixgb_ids.h>
-
-/* Local function prototypes */
-
-static uint32_t ixgb_hash_mc_addr(struct ixgb_hw *hw,
- uint8_t *mc_addr);
-
-static void ixgb_mta_set(struct ixgb_hw *hw,
- uint32_t hash_value);
-
-static void ixgb_get_bus_info(struct ixgb_hw *hw);
-
-static boolean_t ixgb_link_reset(struct ixgb_hw *hw);
-
-static void ixgb_optics_reset(struct ixgb_hw *hw);
-
-static ixgb_phy_type ixgb_identify_phy(struct ixgb_hw *hw);
-
-uint32_t ixgb_mac_reset (struct ixgb_hw* hw);
-
-uint32_t ixgb_mac_reset (struct ixgb_hw* hw)
-{
- uint32_t ctrl_reg;
-
- /* Setup up hardware to known state with RESET.
- * SWDPIN settings as per Kemano EPS.
- */
- ctrl_reg = IXGB_CTRL0_RST |
- IXGB_CTRL0_SDP3_DIR | /* All pins are Output=1 */
- IXGB_CTRL0_SDP2_DIR |
- IXGB_CTRL0_SDP1_DIR |
- IXGB_CTRL0_SDP0_DIR |
- IXGB_CTRL0_SDP3 | /* Initial value 1101 */
- IXGB_CTRL0_SDP2 |
- IXGB_CTRL0_SDP0;
-
-#ifdef HP_ZX1
- /* Workaround for 82597EX reset errata */
- IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg);
-#else
- IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
-#endif
-
- /* Delay a few ms just to allow the reset to complete */
- msec_delay(IXGB_DELAY_AFTER_RESET);
- ctrl_reg = IXGB_READ_REG(hw, CTRL0);
-#if DBG
- /* Make sure the self-clearing global reset bit did self clear */
- ASSERT(!(ctrl_reg & IXGB_CTRL0_RST));
-#endif
-
- if (hw->phy_type == ixgb_phy_type_txn17401) {
- /* Now reset the optics. This reset is required to ensure link with
- * the Kemano 003 optical module (TXN17401), as per instructions from
- * the board designer.
- */
- ixgb_optics_reset(hw);
- }
-
- return ctrl_reg;
-}
-
-
-/******************************************************************************
- * Reset the transmit and receive units; mask and clear all interrupts.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-boolean_t
-ixgb_adapter_stop(struct ixgb_hw *hw)
-{
- uint32_t ctrl_reg;
- uint32_t icr_reg;
-
- DEBUGFUNC("ixgb_adapter_stop");
-
- /* If we are stopped or resetting exit gracefully and wait to be
- * started again before accessing the hardware.
- */
- if(hw->adapter_stopped) {
- DEBUGOUT("Exiting because the adapter is already stopped!!!\n");
- return FALSE;
- }
-
- /* Set the Adapter Stopped flag so other driver functions stop
- * touching the Hardware.
- */
- hw->adapter_stopped = TRUE;
-
- /* Clear interrupt mask to stop board from generating interrupts */
- DEBUGOUT("Masking off all interrupts\n");
- IXGB_WRITE_REG(hw, IMC, 0xFFFFFFFF);
-
- /* Disable the Transmit and Receive units. Then delay to allow
- * any pending transactions to complete before we hit the MAC with
- * the global reset.
- */
- IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN);
- IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN);
- msec_delay(IXGB_DELAY_BEFORE_RESET);
-
- /* Issue a global reset to the MAC. This will reset the chip's
- * transmit, receive, DMA, and link units. It will not effect
- * the current PCI configuration. The global reset bit is self-
- * clearing, and should clear within a microsecond.
- */
- DEBUGOUT("Issuing a global reset to MAC\n");
-
- ctrl_reg = ixgb_mac_reset(hw);
-
- /* Clear interrupt mask to stop board from generating interrupts */
- DEBUGOUT("Masking off all interrupts\n");
- IXGB_WRITE_REG(hw, IMC, 0xffffffff);
-
- /* Clear any pending interrupt events. */
- icr_reg = IXGB_READ_REG(hw, ICR);
-
- return (ctrl_reg & IXGB_CTRL0_RST);
-}
-
-
-/******************************************************************************
- * Identifies the vendor of the optics module on the adapter. The SR adapters
- * support two different types of XPAK optics, so it is necessary to determine
- * which optics are present before applying any optics-specific workarounds.
- *
- * hw - Struct containing variables accessed by shared code.
- *
- * Returns: the vendor of the XPAK optics module.
- *****************************************************************************/
-static ixgb_xpak_vendor
-ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
-{
- uint32_t i;
- uint16_t vendor_name[5];
- ixgb_xpak_vendor xpak_vendor;
-
- DEBUGFUNC("ixgb_identify_xpak_vendor");
-
- /* Read the first few bytes of the vendor string from the XPAK NVR
- * registers. These are standard XENPAK/XPAK registers, so all XPAK
- * devices should implement them. */
- for (i = 0; i < 5; i++) {
- vendor_name[i] = ixgb_read_phy_reg( hw,
- MDIO_PMA_PMD_XPAK_VENDOR_NAME + i,
- IXGB_PHY_ADDRESS,
- MDIO_PMA_PMD_DID );
- }
-
- /* Determine the actual vendor */
- if (vendor_name[0] == 'I' &&
- vendor_name[1] == 'N' &&
- vendor_name[2] == 'T' &&
- vendor_name[3] == 'E' &&
- vendor_name[4] == 'L') {
- xpak_vendor = ixgb_xpak_vendor_intel;
- }
- else {
- xpak_vendor = ixgb_xpak_vendor_infineon;
- }
-
- return (xpak_vendor);
-}
-
-
-/******************************************************************************
- * Determine the physical layer module on the adapter.
- *
- * hw - Struct containing variables accessed by shared code. The device_id
- * field must be (correctly) populated before calling this routine.
- *
- * Returns: the phy type of the adapter.
- *****************************************************************************/
-static ixgb_phy_type
-ixgb_identify_phy(struct ixgb_hw *hw)
-{
- ixgb_phy_type phy_type;
- ixgb_xpak_vendor xpak_vendor;
-
- DEBUGFUNC("ixgb_identify_phy");
-
- /* Infer the transceiver/phy type from the device id */
- switch (hw->device_id) {
- case IXGB_DEVICE_ID_82597EX:
- DEBUGOUT("Identified TXN17401 optics\n");
- phy_type = ixgb_phy_type_txn17401;
- break;
-
- case IXGB_DEVICE_ID_82597EX_SR:
- /* The SR adapters carry two different types of XPAK optics
- * modules; read the vendor identifier to determine the exact
- * type of optics. */
- xpak_vendor = ixgb_identify_xpak_vendor(hw);
- if (xpak_vendor == ixgb_xpak_vendor_intel) {
- DEBUGOUT("Identified TXN17201 optics\n");
- phy_type = ixgb_phy_type_txn17201;
- }
- else {
- DEBUGOUT("Identified G6005 optics\n");
- phy_type = ixgb_phy_type_g6005;
- }
- break;
-
-
- default:
- DEBUGOUT("Unknown physical layer module\n");
- phy_type = ixgb_phy_type_unknown;
- break;
- }
-
- return (phy_type);
-}
-
-/******************************************************************************
- * Performs basic configuration of the adapter.
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Resets the controller.
- * Reads and validates the EEPROM.
- * Initializes the receive address registers.
- * Initializes the multicast table.
- * Clears all on-chip counters.
- * Calls routine to setup flow control settings.
- * Leaves the transmit and receive units disabled and uninitialized.
- *
- * Returns:
- * TRUE if successful,
- * FALSE if unrecoverable problems were encountered.
- *****************************************************************************/
-boolean_t
-ixgb_init_hw(struct ixgb_hw *hw)
-{
- uint32_t i;
- uint32_t ctrl_reg;
- boolean_t status;
-
- DEBUGFUNC("ixgb_init_hw");
-
- /* Issue a global reset to the MAC. This will reset the chip's
- * transmit, receive, DMA, and link units. It will not effect
- * the current PCI configuration. The global reset bit is self-
- * clearing, and should clear within a microsecond.
- */
- DEBUGOUT("Issuing a global reset to MAC\n");
-
- ctrl_reg = ixgb_mac_reset(hw);
-
- DEBUGOUT("Issuing an EE reset to MAC\n");
-#ifdef HP_ZX1
- /* Workaround for 82597EX reset errata */
- IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST);
-#else
- IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST);
-#endif
-
- /* Delay a few ms just to allow the reset to complete */
- msec_delay(IXGB_DELAY_AFTER_EE_RESET);
-
- if (ixgb_get_eeprom_data(hw) == FALSE) {
- return(FALSE);
- }
-
- /* Use the device id to determine the type of phy/transceiver. */
- hw->device_id = ixgb_get_ee_device_id(hw);
- hw->phy_type = ixgb_identify_phy(hw);
-
- /* Setup the receive addresses.
- * Receive Address Registers (RARs 0 - 15).
- */
- ixgb_init_rx_addrs(hw);
-
- /*
- * Check that a valid MAC address has been set.
- * If it is not valid, we fail hardware init.
- */
- if (!mac_addr_valid(hw->curr_mac_addr)) {
- DEBUGOUT("MAC address invalid after ixgb_init_rx_addrs\n");
- return(FALSE);
- }
-
- /* tell the routines in this file they can access hardware again */
- hw->adapter_stopped = FALSE;
-
- /* Fill in the bus_info structure */
- ixgb_get_bus_info(hw);
-
- /* Zero out the Multicast HASH table */
- DEBUGOUT("Zeroing the MTA\n");
- for(i = 0; i < IXGB_MC_TBL_SIZE; i++)
- IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);
-
- /* Zero out the VLAN Filter Table Array */
- ixgb_clear_vfta(hw);
-
- /* Zero all of the hardware counters */
- ixgb_clear_hw_cntrs(hw);
-
- /* Call a subroutine to setup flow control. */
- status = ixgb_setup_fc(hw);
-
- /* 82597EX errata: Call check-for-link in case lane deskew is locked */
- ixgb_check_for_link(hw);
-
- return (status);
-}
-
-/******************************************************************************
- * Initializes receive address filters.
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Places the MAC address in receive address register 0 and clears the rest
- * of the receive addresss registers. Clears the multicast table. Assumes
- * the receiver is in reset when the routine is called.
- *****************************************************************************/
-void
-ixgb_init_rx_addrs(struct ixgb_hw *hw)
-{
- uint32_t i;
-
- DEBUGFUNC("ixgb_init_rx_addrs");
-
- /*
- * If the current mac address is valid, assume it is a software override
- * to the permanent address.
- * Otherwise, use the permanent address from the eeprom.
- */
- if (!mac_addr_valid(hw->curr_mac_addr)) {
-
- /* Get the MAC address from the eeprom for later reference */
- ixgb_get_ee_mac_addr(hw, hw->curr_mac_addr);
-
- DEBUGOUT3(" Keeping Permanent MAC Addr =%.2X %.2X %.2X ",
- hw->curr_mac_addr[0],
- hw->curr_mac_addr[1],
- hw->curr_mac_addr[2]);
- DEBUGOUT3("%.2X %.2X %.2X\n",
- hw->curr_mac_addr[3],
- hw->curr_mac_addr[4],
- hw->curr_mac_addr[5]);
- } else {
-
- /* Setup the receive address. */
- DEBUGOUT("Overriding MAC Address in RAR[0]\n");
- DEBUGOUT3(" New MAC Addr =%.2X %.2X %.2X ",
- hw->curr_mac_addr[0],
- hw->curr_mac_addr[1],
- hw->curr_mac_addr[2]);
- DEBUGOUT3("%.2X %.2X %.2X\n",
- hw->curr_mac_addr[3],
- hw->curr_mac_addr[4],
- hw->curr_mac_addr[5]);
-
-
- ixgb_rar_set(hw, hw->curr_mac_addr, 0);
- }
-
- /* Zero out the other 15 receive addresses. */
- DEBUGOUT("Clearing RAR[1-15]\n");
- for(i = 1; i < IXGB_RAR_ENTRIES; i++) {
- IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
- IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
- }
-
- return;
-}
-
-/******************************************************************************
- * Updates the MAC's list of multicast addresses.
- *
- * hw - Struct containing variables accessed by shared code
- * mc_addr_list - the list of new multicast addresses
- * mc_addr_count - number of addresses
- * pad - number of bytes between addresses in the list
- *
- * The given list replaces any existing list. Clears the last 15 receive
- * address registers and the multicast table. Uses receive address registers
- * for the first 15 multicast addresses, and hashes the rest into the
- * multicast table.
- *****************************************************************************/
-void
-ixgb_mc_addr_list_update(struct ixgb_hw *hw,
- uint8_t *mc_addr_list,
- uint32_t mc_addr_count,
- uint32_t pad)
-{
- uint32_t hash_value;
- uint32_t i;
- uint32_t rar_used_count = 1; /* RAR[0] is used for our MAC address */
-
- DEBUGFUNC("ixgb_mc_addr_list_update");
-
- /* Set the new number of MC addresses that we are being requested to use. */
- hw->num_mc_addrs = mc_addr_count;
-
- /* Clear RAR[1-15] */
- DEBUGOUT(" Clearing RAR[1-15]\n");
- for(i = rar_used_count; i < IXGB_RAR_ENTRIES; i++) {
- IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
- IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
- }
-
- /* Clear the MTA */
- DEBUGOUT(" Clearing MTA\n");
- for(i = 0; i < IXGB_MC_TBL_SIZE; i++) {
- IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);
- }
-
- /* Add the new addresses */
- for(i = 0; i < mc_addr_count; i++) {
- DEBUGOUT(" Adding the multicast addresses:\n");
- DEBUGOUT7(" MC Addr #%d =%.2X %.2X %.2X %.2X %.2X %.2X\n", i,
- mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad)],
- mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) + 1],
- mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) + 2],
- mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) + 3],
- mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) + 4],
- mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) + 5]);
-
- /* Place this multicast address in the RAR if there is room, *
- * else put it in the MTA
- */
- if(rar_used_count < IXGB_RAR_ENTRIES) {
- ixgb_rar_set(hw,
- mc_addr_list + (i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad)),
- rar_used_count);
- DEBUGOUT1("Added a multicast address to RAR[%d]\n", i);
- rar_used_count++;
- } else {
- hash_value = ixgb_hash_mc_addr(hw,
- mc_addr_list +
- (i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad)));
-
- DEBUGOUT1(" Hash value = 0x%03X\n", hash_value);
-
- ixgb_mta_set(hw, hash_value);
- }
- }
-
- DEBUGOUT("MC Update Complete\n");
- return;
-}
-
-/******************************************************************************
- * Hashes an address to determine its location in the multicast table
- *
- * hw - Struct containing variables accessed by shared code
- * mc_addr - the multicast address to hash
- *
- * Returns:
- * The hash value
- *****************************************************************************/
-static uint32_t
-ixgb_hash_mc_addr(struct ixgb_hw *hw,
- uint8_t *mc_addr)
-{
- uint32_t hash_value = 0;
-
- DEBUGFUNC("ixgb_hash_mc_addr");
-
- /* The portion of the address that is used for the hash table is
- * determined by the mc_filter_type setting.
- */
- switch (hw->mc_filter_type) {
- /* [0] [1] [2] [3] [4] [5]
- * 01 AA 00 12 34 56
- * LSB MSB - According to H/W docs */
- case 0:
- /* [47:36] i.e. 0x563 for above example address */
- hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
- break;
- case 1: /* [46:35] i.e. 0xAC6 for above example address */
- hash_value = ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5));
- break;
- case 2: /* [45:34] i.e. 0x5D8 for above example address */
- hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
- break;
- case 3: /* [43:32] i.e. 0x634 for above example address */
- hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8));
- break;
- default:
- /* Invalid mc_filter_type, what should we do? */
- DEBUGOUT("MC filter type param set incorrectly\n");
- ASSERT(0);
- break;
- }
-
- hash_value &= 0xFFF;
- return (hash_value);
-}
-
-/******************************************************************************
- * Sets the bit in the multicast table corresponding to the hash value.
- *
- * hw - Struct containing variables accessed by shared code
- * hash_value - Multicast address hash value
- *****************************************************************************/
-static void
-ixgb_mta_set(struct ixgb_hw *hw,
- uint32_t hash_value)
-{
- uint32_t hash_bit, hash_reg;
- uint32_t mta_reg;
-
- /* The MTA is a register array of 128 32-bit registers.
- * It is treated like an array of 4096 bits. We want to set
- * bit BitArray[hash_value]. So we figure out what register
- * the bit is in, read it, OR in the new bit, then write
- * back the new value. The register is determined by the
- * upper 7 bits of the hash value and the bit within that
- * register are determined by the lower 5 bits of the value.
- */
- hash_reg = (hash_value >> 5) & 0x7F;
- hash_bit = hash_value & 0x1F;
-
- mta_reg = IXGB_READ_REG_ARRAY(hw, MTA, hash_reg);
-
- mta_reg |= (1 << hash_bit);
-
- IXGB_WRITE_REG_ARRAY(hw, MTA, hash_reg, mta_reg);
-
- return;
-}
-
-/******************************************************************************
- * Puts an ethernet address into a receive address register.
- *
- * hw - Struct containing variables accessed by shared code
- * addr - Address to put into receive address register
- * index - Receive address register to write
- *****************************************************************************/
-void
-ixgb_rar_set(struct ixgb_hw *hw,
- uint8_t *addr,
- uint32_t index)
-{
- uint32_t rar_low, rar_high;
-
- DEBUGFUNC("ixgb_rar_set");
-
- /* HW expects these in little endian so we reverse the byte order
- * from network order (big endian) to little endian
- */
- rar_low = ((uint32_t) addr[0] |
- ((uint32_t) addr[1] << 8) |
- ((uint32_t) addr[2] << 16) |
- ((uint32_t) addr[3] << 24));
-
- rar_high = ((uint32_t) addr[4] |
- ((uint32_t) addr[5] << 8) |
- IXGB_RAH_AV);
-
- IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
- IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
- return;
-}
-
-/******************************************************************************
- * Writes a value to the specified offset in the VLAN filter table.
- *
- * hw - Struct containing variables accessed by shared code
- * offset - Offset in VLAN filer table to write
- * value - Value to write into VLAN filter table
- *****************************************************************************/
-void
-ixgb_write_vfta(struct ixgb_hw *hw,
- uint32_t offset,
- uint32_t value)
-{
- IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);
- return;
-}
-
-/******************************************************************************
- * Clears the VLAN filer table
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-void
-ixgb_clear_vfta(struct ixgb_hw *hw)
-{
- uint32_t offset;
-
- for(offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++)
- IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
- return;
-}
-
-/******************************************************************************
- * Configures the flow control settings based on SW configuration.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-
-boolean_t
-ixgb_setup_fc(struct ixgb_hw *hw)
-{
- uint32_t ctrl_reg;
- uint32_t pap_reg = 0; /* by default, assume no pause time */
- boolean_t status = TRUE;
-
- DEBUGFUNC("ixgb_setup_fc");
-
- /* Get the current control reg 0 settings */
- ctrl_reg = IXGB_READ_REG(hw, CTRL0);
-
- /* Clear the Receive Pause Enable and Transmit Pause Enable bits */
- ctrl_reg &= ~(IXGB_CTRL0_RPE | IXGB_CTRL0_TPE);
-
- /* The possible values of the "flow_control" parameter are:
- * 0: Flow control is completely disabled
- * 1: Rx flow control is enabled (we can receive pause frames
- * but not send pause frames).
- * 2: Tx flow control is enabled (we can send pause frames
- * but we do not support receiving pause frames).
- * 3: Both Rx and TX flow control (symmetric) are enabled.
- * other: Invalid.
- */
- switch (hw->fc.type) {
- case ixgb_fc_none: /* 0 */
- /* Set CMDC bit to disable Rx Flow control*/
- ctrl_reg |= (IXGB_CTRL0_CMDC);
- break;
- case ixgb_fc_rx_pause: /* 1 */
- /* RX Flow control is enabled, and TX Flow control is
- * disabled.
- */
- ctrl_reg |= (IXGB_CTRL0_RPE);
- break;
- case ixgb_fc_tx_pause: /* 2 */
- /* TX Flow control is enabled, and RX Flow control is
- * disabled, by a software over-ride.
- */
- ctrl_reg |= (IXGB_CTRL0_TPE);
- pap_reg = hw->fc.pause_time;
- break;
- case ixgb_fc_full: /* 3 */
- /* Flow control (both RX and TX) is enabled by a software
- * over-ride.
- */
- ctrl_reg |= (IXGB_CTRL0_RPE | IXGB_CTRL0_TPE);
- pap_reg = hw->fc.pause_time;
- break;
- default:
- /* We should never get here. The value should be 0-3. */
- DEBUGOUT("Flow control param set incorrectly\n");
- ASSERT(0);
- break;
- }
-
- /* Write the new settings */
- IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
-
- if (pap_reg != 0) {
- IXGB_WRITE_REG(hw, PAP, pap_reg);
- }
-
- /* Set the flow control receive threshold registers. Normally,
- * these registers will be set to a default threshold that may be
- * adjusted later by the driver's runtime code. However, if the
- * ability to transmit pause frames in not enabled, then these
- * registers will be set to 0.
- */
- if(!(hw->fc.type & ixgb_fc_tx_pause)) {
- IXGB_WRITE_REG(hw, FCRTL, 0);
- IXGB_WRITE_REG(hw, FCRTH, 0);
- } else {
- /* We need to set up the Receive Threshold high and low water
- * marks as well as (optionally) enabling the transmission of XON frames.
- */
- if(hw->fc.send_xon) {
- IXGB_WRITE_REG(hw, FCRTL,
- (hw->fc.low_water | IXGB_FCRTL_XONE));
- } else {
- IXGB_WRITE_REG(hw, FCRTL, hw->fc.low_water);
- }
- IXGB_WRITE_REG(hw, FCRTH, hw->fc.high_water);
- }
- return (status);
-}
-
-/******************************************************************************
- * Reads a word from a device over the Management Data Interface (MDI) bus.
- * This interface is used to manage Physical layer devices.
- *
- * hw - Struct containing variables accessed by hw code
- * reg_address - Offset of device register being read.
- * phy_address - Address of device on MDI.
- *
- * Returns: Data word (16 bits) from MDI device.
- *
- * The 82597EX has support for several MDI access methods. This routine
- * uses the new protocol MDI Single Command and Address Operation.
- * This requires that first an address cycle command is sent, followed by a
- * read command.
- *****************************************************************************/
-uint16_t
-ixgb_read_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_address,
- uint32_t phy_address,
- uint32_t device_type)
-{
- uint32_t i;
- uint32_t data;
- uint32_t command = 0;
-
- ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
- ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
- ASSERT(device_type <= IXGB_MAX_PHY_DEV_TYPE);
-
- /* Setup and write the address cycle command */
- command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
- (device_type << IXGB_MSCA_DEV_TYPE_SHIFT) |
- (phy_address << IXGB_MSCA_PHY_ADDR_SHIFT) |
- (IXGB_MSCA_ADDR_CYCLE | IXGB_MSCA_MDI_COMMAND));
-
- IXGB_WRITE_REG(hw, MSCA, command);
-
- /**************************************************************
- ** Check every 10 usec to see if the address cycle completed
- ** The COMMAND bit will clear when the operation is complete.
- ** This may take as long as 64 usecs (we'll wait 100 usecs max)
- ** from the CPU Write to the Ready bit assertion.
- **************************************************************/
-
- for (i = 0; i < 10; i++)
- {
- usec_delay(10);
-
- command = IXGB_READ_REG(hw, MSCA);
-
- if ((command & IXGB_MSCA_MDI_COMMAND) == 0)
- break;
- }
-
- ASSERT((command & IXGB_MSCA_MDI_COMMAND) == 0);
-
- /* Address cycle complete, setup and write the read command */
- command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
- (device_type << IXGB_MSCA_DEV_TYPE_SHIFT) |
- (phy_address << IXGB_MSCA_PHY_ADDR_SHIFT) |
- (IXGB_MSCA_READ | IXGB_MSCA_MDI_COMMAND));
-
- IXGB_WRITE_REG(hw, MSCA, command);
-
- /**************************************************************
- ** Check every 10 usec to see if the read command completed
- ** The COMMAND bit will clear when the operation is complete.
- ** The read may take as long as 64 usecs (we'll wait 100 usecs max)
- ** from the CPU Write to the Ready bit assertion.
- **************************************************************/
-
- for (i = 0; i < 10; i++)
- {
- usec_delay(10);
-
- command = IXGB_READ_REG(hw, MSCA);
-
- if ((command & IXGB_MSCA_MDI_COMMAND) == 0)
- break;
- }
-
- ASSERT((command & IXGB_MSCA_MDI_COMMAND) == 0);
-
- /* Operation is complete, get the data from the MDIO Read/Write Data
- * register and return.
- */
- data = IXGB_READ_REG(hw, MSRWD);
- data >>= IXGB_MSRWD_READ_DATA_SHIFT;
- return((uint16_t) data);
-}
-
-/******************************************************************************
- * Writes a word to a device over the Management Data Interface (MDI) bus.
- * This interface is used to manage Physical layer devices.
- *
- * hw - Struct containing variables accessed by hw code
- * reg_address - Offset of device register being read.
- * phy_address - Address of device on MDI.
- * device_type - Also known as the Device ID or DID.
- * data - 16-bit value to be written
- *
- * Returns: void.
- *
- * The 82597EX has support for several MDI access methods. This routine
- * uses the new protocol MDI Single Command and Address Operation.
- * This requires that first an address cycle command is sent, followed by a
- * write command.
- *****************************************************************************/
-void
-ixgb_write_phy_reg(struct ixgb_hw *hw,
- uint32_t reg_address,
- uint32_t phy_address,
- uint32_t device_type,
- uint16_t data)
-{
- uint32_t i;
- uint32_t command = 0;
-
- ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
- ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
- ASSERT(device_type <= IXGB_MAX_PHY_DEV_TYPE);
-
- /* Put the data in the MDIO Read/Write Data register */
- IXGB_WRITE_REG(hw, MSRWD, (uint32_t)data);
-
- /* Setup and write the address cycle command */
- command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
- (device_type << IXGB_MSCA_DEV_TYPE_SHIFT) |
- (phy_address << IXGB_MSCA_PHY_ADDR_SHIFT) |
- (IXGB_MSCA_ADDR_CYCLE | IXGB_MSCA_MDI_COMMAND));
-
- IXGB_WRITE_REG(hw, MSCA, command);
-
- /**************************************************************
- ** Check every 10 usec to see if the address cycle completed
- ** The COMMAND bit will clear when the operation is complete.
- ** This may take as long as 64 usecs (we'll wait 100 usecs max)
- ** from the CPU Write to the Ready bit assertion.
- **************************************************************/
-
- for (i = 0; i < 10; i++)
- {
- usec_delay(10);
-
- command = IXGB_READ_REG(hw, MSCA);
-
- if ((command & IXGB_MSCA_MDI_COMMAND) == 0)
- break;
- }
-
- ASSERT((command & IXGB_MSCA_MDI_COMMAND) == 0);
-
- /* Address cycle complete, setup and write the write command */
- command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
- (device_type << IXGB_MSCA_DEV_TYPE_SHIFT) |
- (phy_address << IXGB_MSCA_PHY_ADDR_SHIFT) |
- (IXGB_MSCA_WRITE | IXGB_MSCA_MDI_COMMAND));
-
- IXGB_WRITE_REG(hw, MSCA, command);
-
- /**************************************************************
- ** Check every 10 usec to see if the read command completed
- ** The COMMAND bit will clear when the operation is complete.
- ** The write may take as long as 64 usecs (we'll wait 100 usecs max)
- ** from the CPU Write to the Ready bit assertion.
- **************************************************************/
-
- for (i = 0; i < 10; i++)
- {
- usec_delay(10);
-
- command = IXGB_READ_REG(hw, MSCA);
-
- if ((command & IXGB_MSCA_MDI_COMMAND) == 0)
- break;
- }
-
- ASSERT((command & IXGB_MSCA_MDI_COMMAND) == 0);
-
- /* Operation is complete, return. */
-}
-
-
-/******************************************************************************
- * Checks to see if the link status of the hardware has changed.
- *
- * hw - Struct containing variables accessed by hw code
- *
- * Called by any function that needs to check the link status of the adapter.
- *****************************************************************************/
-void
-ixgb_check_for_link(struct ixgb_hw *hw)
-{
- uint32_t status_reg;
- uint32_t xpcss_reg;
-
- DEBUGFUNC("ixgb_check_for_link");
-
- xpcss_reg = IXGB_READ_REG(hw, XPCSS);
- status_reg = IXGB_READ_REG(hw, STATUS);
-
- if ((xpcss_reg & IXGB_XPCSS_ALIGN_STATUS) &&
- (status_reg & IXGB_STATUS_LU)) {
- hw->link_up = TRUE;
- } else if (!(xpcss_reg & IXGB_XPCSS_ALIGN_STATUS) &&
- (status_reg & IXGB_STATUS_LU)) {
- DEBUGOUT("XPCSS Not Aligned while Status:LU is set.\n");
- hw->link_up = ixgb_link_reset(hw);
- } else {
- /*
- * 82597EX errata. Since the lane deskew problem may prevent
- * link, reset the link before reporting link down.
- */
- hw->link_up = ixgb_link_reset(hw);
- }
- /* Anything else for 10 Gig?? */
-}
-
-/******************************************************************************
- * Check for a bad link condition that may have occurred.
- * The indication is that the RFC / LFC registers may be incrementing
- * continually. A full adapter reset is required to recover.
- *
- * hw - Struct containing variables accessed by hw code
- *
- * Called by any function that needs to check the link status of the adapter.
- *****************************************************************************/
-boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw)
-{
- uint32_t newLFC, newRFC;
- boolean_t bad_link_returncode = FALSE;
-
- if (hw->phy_type == ixgb_phy_type_txn17401) {
- newLFC = IXGB_READ_REG(hw, LFC);
- newRFC = IXGB_READ_REG(hw, RFC);
- if ((hw->lastLFC + 250 < newLFC) || (hw->lastRFC + 250 < newRFC)) {
- DEBUGOUT("BAD LINK! too many LFC/RFC since last check\n");
- bad_link_returncode = TRUE;
- }
- hw->lastLFC = newLFC;
- hw->lastRFC = newRFC;
- }
-
- return bad_link_returncode;
-}
-
-
-/******************************************************************************
- * Clears all hardware statistics counters.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-void
-ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
-{
- volatile uint32_t temp_reg;
-
- DEBUGFUNC("ixgb_clear_hw_cntrs");
-
- /* if we are stopped or resetting exit gracefully */
- if(hw->adapter_stopped) {
- DEBUGOUT("Exiting because the adapter is stopped!!!\n");
- return;
- }
-
- temp_reg = IXGB_READ_REG(hw, TPRL);
- temp_reg = IXGB_READ_REG(hw, TPRH);
- temp_reg = IXGB_READ_REG(hw, GPRCL);
- temp_reg = IXGB_READ_REG(hw, GPRCH);
- temp_reg = IXGB_READ_REG(hw, BPRCL);
- temp_reg = IXGB_READ_REG(hw, BPRCH);
- temp_reg = IXGB_READ_REG(hw, MPRCL);
- temp_reg = IXGB_READ_REG(hw, MPRCH);
- temp_reg = IXGB_READ_REG(hw, UPRCL);
- temp_reg = IXGB_READ_REG(hw, UPRCH);
- temp_reg = IXGB_READ_REG(hw, VPRCL);
- temp_reg = IXGB_READ_REG(hw, VPRCH);
- temp_reg = IXGB_READ_REG(hw, JPRCL);
- temp_reg = IXGB_READ_REG(hw, JPRCH);
- temp_reg = IXGB_READ_REG(hw, GORCL);
- temp_reg = IXGB_READ_REG(hw, GORCH);
- temp_reg = IXGB_READ_REG(hw, TORL);
- temp_reg = IXGB_READ_REG(hw, TORH);
- temp_reg = IXGB_READ_REG(hw, RNBC);
- temp_reg = IXGB_READ_REG(hw, RUC);
- temp_reg = IXGB_READ_REG(hw, ROC);
- temp_reg = IXGB_READ_REG(hw, RLEC);
- temp_reg = IXGB_READ_REG(hw, CRCERRS);
- temp_reg = IXGB_READ_REG(hw, ICBC);
- temp_reg = IXGB_READ_REG(hw, ECBC);
- temp_reg = IXGB_READ_REG(hw, MPC);
- temp_reg = IXGB_READ_REG(hw, TPTL);
- temp_reg = IXGB_READ_REG(hw, TPTH);
- temp_reg = IXGB_READ_REG(hw, GPTCL);
- temp_reg = IXGB_READ_REG(hw, GPTCH);
- temp_reg = IXGB_READ_REG(hw, BPTCL);
- temp_reg = IXGB_READ_REG(hw, BPTCH);
- temp_reg = IXGB_READ_REG(hw, MPTCL);
- temp_reg = IXGB_READ_REG(hw, MPTCH);
- temp_reg = IXGB_READ_REG(hw, UPTCL);
- temp_reg = IXGB_READ_REG(hw, UPTCH);
- temp_reg = IXGB_READ_REG(hw, VPTCL);
- temp_reg = IXGB_READ_REG(hw, VPTCH);
- temp_reg = IXGB_READ_REG(hw, JPTCL);
- temp_reg = IXGB_READ_REG(hw, JPTCH);
- temp_reg = IXGB_READ_REG(hw, GOTCL);
- temp_reg = IXGB_READ_REG(hw, GOTCH);
- temp_reg = IXGB_READ_REG(hw, TOTL);
- temp_reg = IXGB_READ_REG(hw, TOTH);
- temp_reg = IXGB_READ_REG(hw, DC);
- temp_reg = IXGB_READ_REG(hw, PLT64C);
- temp_reg = IXGB_READ_REG(hw, TSCTC);
- temp_reg = IXGB_READ_REG(hw, TSCTFC);
- temp_reg = IXGB_READ_REG(hw, IBIC);
- temp_reg = IXGB_READ_REG(hw, RFC);
- temp_reg = IXGB_READ_REG(hw, LFC);
- temp_reg = IXGB_READ_REG(hw, PFRC);
- temp_reg = IXGB_READ_REG(hw, PFTC);
- temp_reg = IXGB_READ_REG(hw, MCFRC);
- temp_reg = IXGB_READ_REG(hw, MCFTC);
- temp_reg = IXGB_READ_REG(hw, XONRXC);
- temp_reg = IXGB_READ_REG(hw, XONTXC);
- temp_reg = IXGB_READ_REG(hw, XOFFRXC);
- temp_reg = IXGB_READ_REG(hw, XOFFTXC);
- temp_reg = IXGB_READ_REG(hw, RJC);
- return;
-}
-
-
-/******************************************************************************
- * Turns on the software controllable LED
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-void
-ixgb_led_on(struct ixgb_hw *hw)
-{
- uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
-
- /* To turn on the LED, clear software-definable pin 0 (SDP0). */
- ctrl0_reg &= ~IXGB_CTRL0_SDP0;
- IXGB_WRITE_REG(hw, CTRL0, ctrl0_reg);
- return;
-}
-
-/******************************************************************************
- * Turns off the software controllable LED
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-void
-ixgb_led_off(struct ixgb_hw *hw)
-{
- uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
-
- /* To turn off the LED, set software-definable pin 0 (SDP0). */
- ctrl0_reg |= IXGB_CTRL0_SDP0;
- IXGB_WRITE_REG(hw, CTRL0, ctrl0_reg);
- return;
-}
-
-
-/******************************************************************************
- * Gets the current PCI bus type, speed, and width of the hardware
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-static void
-ixgb_get_bus_info(struct ixgb_hw *hw)
-{
- uint32_t status_reg;
-
- status_reg = IXGB_READ_REG(hw, STATUS);
-
- hw->bus.type = (status_reg & IXGB_STATUS_PCIX_MODE) ?
- ixgb_bus_type_pcix : ixgb_bus_type_pci;
-
- if (hw->bus.type == ixgb_bus_type_pci) {
- hw->bus.speed = (status_reg & IXGB_STATUS_PCI_SPD) ?
- ixgb_bus_speed_66 : ixgb_bus_speed_33;
- } else {
- switch (status_reg & IXGB_STATUS_PCIX_SPD_MASK) {
- case IXGB_STATUS_PCIX_SPD_66:
- hw->bus.speed = ixgb_bus_speed_66;
- break;
- case IXGB_STATUS_PCIX_SPD_100:
- hw->bus.speed = ixgb_bus_speed_100;
- break;
- case IXGB_STATUS_PCIX_SPD_133:
- hw->bus.speed = ixgb_bus_speed_133;
- break;
- default:
- hw->bus.speed = ixgb_bus_speed_reserved;
- break;
- }
- }
-
- hw->bus.width = (status_reg & IXGB_STATUS_BUS64) ?
- ixgb_bus_width_64 : ixgb_bus_width_32;
-
- return;
-}
-
-
-
-/******************************************************************************
- * Tests a MAC address to ensure it is a valid Individual Address
- *
- * mac_addr - pointer to MAC address.
- *
- *****************************************************************************/
-boolean_t
-mac_addr_valid(uint8_t *mac_addr)
-{
- boolean_t is_valid = TRUE;
- DEBUGFUNC("mac_addr_valid");
-
-
- /* Make sure it is not a multicast address */
- if (IS_MULTICAST(mac_addr)) {
- DEBUGOUT("MAC address is multicast\n");
- is_valid = FALSE;
- }
- /* Not a broadcast address */
- else if (IS_BROADCAST(mac_addr)) {
- DEBUGOUT("MAC address is broadcast\n");
- is_valid = FALSE;
- }
- /* Reject the zero address */
- else if (mac_addr[0] == 0 &&
- mac_addr[1] == 0 &&
- mac_addr[2] == 0 &&
- mac_addr[3] == 0 &&
- mac_addr[4] == 0 &&
- mac_addr[5] == 0) {
- DEBUGOUT("MAC address is all zeros\n");
- is_valid = FALSE;
- }
- return (is_valid);
-}
-
-/******************************************************************************
- * Resets the 10GbE link. Waits the settle time and returns the state of
- * the link.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-boolean_t
-ixgb_link_reset(struct ixgb_hw *hw)
-{
- boolean_t link_status = FALSE;
- uint8_t wait_retries = MAX_RESET_ITERATIONS;
- uint8_t lrst_retries = MAX_RESET_ITERATIONS;
-
-
- do {
- /* Reset the link */
- IXGB_WRITE_REG(hw, CTRL0, IXGB_READ_REG(hw, CTRL0) | IXGB_CTRL0_LRST);
-
- /* Wait for link-up and lane re-alignment */
- do {
- usec_delay(IXGB_DELAY_USECS_AFTER_LINK_RESET);
- link_status = ((IXGB_READ_REG(hw, STATUS) & IXGB_STATUS_LU) &&
- (IXGB_READ_REG(hw, XPCSS) & IXGB_XPCSS_ALIGN_STATUS)) ?
- TRUE : FALSE;
- } while (!link_status && -- wait_retries);
-
- } while (!link_status && --lrst_retries);
-
- return link_status;
-}
-
-
-
-/******************************************************************************
- * Resets the 10GbE optics module.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-void
-ixgb_optics_reset(struct ixgb_hw *hw)
-{
- if (hw->phy_type == ixgb_phy_type_txn17401) {
- uint16_t mdio_reg;
-
- ixgb_write_phy_reg( hw,
- MDIO_PMA_PMD_CR1,
- IXGB_PHY_ADDRESS,
- MDIO_PMA_PMD_DID,
- MDIO_PMA_PMD_CR1_RESET);
-
- mdio_reg = ixgb_read_phy_reg( hw,
- MDIO_PMA_PMD_CR1,
- IXGB_PHY_ADDRESS,
- MDIO_PMA_PMD_DID);
- }
-
- return;
-}
-
Index: sys/dev/ixgb/ixgb_ids.h
===================================================================
--- sys/dev/ixgb/ixgb_ids.h
+++ sys/dev/ixgb/ixgb_ids.h
@@ -1,58 +0,0 @@
-/*******************************************************************************
- SPDX-License-Identifier: BSD-3-Clause
-
- Copyright (c) 2001-2004, Intel Corporation
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-/*$FreeBSD$*/
-
-#ifndef _IXGB_IDS_H_
-#define _IXGB_IDS_H_
-
-/**********************************************************************
-** The Device IDs for 10 Gigabit MACs
-**********************************************************************/
-
-#define IXGB_DEVICE_ID_82597EX 0x1048 /* Cibolo A1, -LR (1310nm) */
-#define IXGB_DEVICE_ID_82597EX_SR 0x1A48 /* Cibolo B0, -SR (850nm) */
-
-#define IXGB_SUBDEVICE_ID_A11F 0xA11F /* Adapter-OEM-1310nm-Fiber */
-#define IXGB_SUBDEVICE_ID_A01F 0xA01F /* Adapter-Retail-1310nm-Fiber */
-
-#define IXGB_SUBDEVICE_ID_A15F 0xA15F /* Adapter-OEM-850nm-Fiber */
-#define IXGB_SUBDEVICE_ID_A05F 0xA05F /* Adapter-Retail-850nm-Fiber */
-
-#define IXGB_SUBDEVICE_ID_A12F 0xA12F /* Adapter-OEM-1310nm-Fiber */
-#define IXGB_SUBDEVICE_ID_A02F 0xA02F /* Adapter-Retail-1310nm-Fiber */
-
-#endif /* #ifndef _IXGB_IDS_H_ */
-
-/* End of File */
Index: sys/i386/conf/GENERIC
===================================================================
--- sys/i386/conf/GENERIC
+++ sys/i386/conf/GENERIC
@@ -230,7 +230,6 @@
device bxe # Broadcom NetXtreme II BCM5771X/BCM578XX 10GbE
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 Gigabit Ethernet Family
-device ixgb # Intel PRO/10GbE Ethernet Card
device le # AMD Am7900 LANCE and Am79C9xx PCnet
device ti # Alteon Networks Tigon I/II gigabit Ethernet
device txp # 3Com 3cR990 (``Typhoon'')
Index: sys/modules/Makefile
===================================================================
--- sys/modules/Makefile
+++ sys/modules/Makefile
@@ -203,7 +203,6 @@
${_iwnfw} \
${_ix} \
${_ixv} \
- ${_ixgb} \
${_ixl} \
${_ixlv} \
jme \
@@ -667,7 +666,6 @@
_iwi= iwi
_iwm= iwm
_iwn= iwn
-_ixgb= ixgb
.if ${MK_SOURCELESS_UCODE} != "no"
_ipwfw= ipwfw
_iwifw= iwifw
Index: sys/modules/ixgb/Makefile
===================================================================
--- sys/modules/ixgb/Makefile
+++ sys/modules/ixgb/Makefile
@@ -1,9 +0,0 @@
-#$FreeBSD$
-
-.PATH: ${SRCTOP}/sys/dev/ixgb
-
-KMOD= if_ixgb
-SRCS= if_ixgb.c ixgb_hw.c ixgb_ee.c
-SRCS+= device_if.h bus_if.h pci_if.h
-
-.include <bsd.kmod.mk>
Index: sys/netpfil/pf/pf.c
===================================================================
--- sys/netpfil/pf/pf.c
+++ sys/netpfil/pf/pf.c
@@ -5727,8 +5727,7 @@
/*
* FreeBSD supports cksum offloads for the following drivers.
- * em(4), fxp(4), ixgb(4), lge(4), ndis(4), nge(4), re(4),
- * ti(4), txp(4), xl(4)
+ * em(4), fxp(4), lge(4), ndis(4), nge(4), re(4), ti(4), txp(4), xl(4)
*
* CSUM_DATA_VALID | CSUM_PSEUDO_HDR :
* network driver performed cksum including pseudo header, need to verify
Index: sys/sparc64/conf/GENERIC
===================================================================
--- sys/sparc64/conf/GENERIC
+++ sys/sparc64/conf/GENERIC
@@ -177,7 +177,6 @@
# PCI Ethernet NICs.
#device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-#device ixgb # Intel PRO/10GbE Ethernet Card
device le # AMD Am7900 LANCE and Am79C9xx PCnet
device ti # Alteon Networks Tigon I/II gigabit Ethernet
device txp # 3Com 3cR990 (``Typhoon'')
Index: tools/kerneldoc/subsys/Doxyfile-dev_ixgb
===================================================================
--- tools/kerneldoc/subsys/Doxyfile-dev_ixgb
+++ tools/kerneldoc/subsys/Doxyfile-dev_ixgb
@@ -1,21 +0,0 @@
-# Doxyfile 1.5.2
-
-# $FreeBSD$
-
-#---------------------------------------------------------------------------
-# Project related configuration options
-#---------------------------------------------------------------------------
-PROJECT_NAME = "FreeBSD kernel IXGB device code"
-OUTPUT_DIRECTORY = $(DOXYGEN_DEST_PATH)/dev_ixgb/
-EXTRACT_ALL = YES # for undocumented src, no warnings enabled
-#---------------------------------------------------------------------------
-# configuration options related to the input files
-#---------------------------------------------------------------------------
-INPUT = $(DOXYGEN_SRC_PATH)/dev/ixgb/ \
- $(NOTREVIEWED)
-
-GENERATE_TAGFILE = dev_ixgb/dev_ixgb.tag
-
-@INCLUDE_PATH = $(DOXYGEN_INCLUDE_PATH)
-@INCLUDE = common-Doxyfile
-
Index: tools/tools/tinybsd/conf/bridge/TINYBSD
===================================================================
--- tools/tools/tinybsd/conf/bridge/TINYBSD
+++ tools/tools/tinybsd/conf/bridge/TINYBSD
@@ -80,7 +80,6 @@
# PCI Ethernet NICs.
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-device ixgb # Intel PRO/10GbE Ethernet Card
device txp # 3Com 3cR990 (``Typhoon'')
device vx # 3Com 3c590, 3c595 (``Vortex'')
Index: tools/tools/tinybsd/conf/default/TINYBSD
===================================================================
--- tools/tools/tinybsd/conf/default/TINYBSD
+++ tools/tools/tinybsd/conf/default/TINYBSD
@@ -90,7 +90,6 @@
# PCI Ethernet NICs.
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-device ixgb # Intel PRO/10GbE Ethernet Card
device txp # 3Com 3cR990 (``Typhoon'')
device vx # 3Com 3c590, 3c595 (``Vortex'')
Index: tools/tools/tinybsd/conf/firewall/TINYBSD
===================================================================
--- tools/tools/tinybsd/conf/firewall/TINYBSD
+++ tools/tools/tinybsd/conf/firewall/TINYBSD
@@ -79,7 +79,6 @@
# PCI Ethernet NICs.
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-device ixgb # Intel PRO/10GbE Ethernet Card
device txp # 3Com 3cR990 (``Typhoon'')
device vx # 3Com 3c590, 3c595 (``Vortex'')
Index: tools/tools/tinybsd/conf/vpn/TINYBSD
===================================================================
--- tools/tools/tinybsd/conf/vpn/TINYBSD
+++ tools/tools/tinybsd/conf/vpn/TINYBSD
@@ -80,7 +80,6 @@
# PCI Ethernet NICs.
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-device ixgb # Intel PRO/10GbE Ethernet Card
device txp # 3Com 3cR990 (``Typhoon'')
device vx # 3Com 3c590, 3c595 (``Vortex'')
Index: tools/tools/tinybsd/conf/wireless/TINYBSD
===================================================================
--- tools/tools/tinybsd/conf/wireless/TINYBSD
+++ tools/tools/tinybsd/conf/wireless/TINYBSD
@@ -80,7 +80,6 @@
# PCI Ethernet NICs.
#device de # DEC/Intel DC21x4x (``Tulip'')
#device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-#device ixgb # Intel PRO/10GbE Ethernet Card
#device txp # 3Com 3cR990 (``Typhoon'')
#device vx # 3Com 3c590, 3c595 (``Vortex'')
Index: tools/tools/tinybsd/conf/wrap/TINYBSD
===================================================================
--- tools/tools/tinybsd/conf/wrap/TINYBSD
+++ tools/tools/tinybsd/conf/wrap/TINYBSD
@@ -48,7 +48,6 @@
# PCI Ethernet NICs.
device de # DEC/Intel DC21x4x (``Tulip'')
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
-device ixgb # Intel PRO/10GbE Ethernet Card
device txp # 3Com 3cR990 (``Typhoon'')
device vx # 3Com 3c590, 3c595 (``Vortex'')
Index: usr.sbin/bsdconfig/share/device.subr
===================================================================
--- usr.sbin/bsdconfig/share/device.subr
+++ usr.sbin/bsdconfig/share/device.subr
@@ -1321,7 +1321,6 @@
f_network "iwi%d" "Intel PRO/Wireless 2200BG/2225BG/2915ABG adapter"
f_network "iwn%d" "Intel Wireless WiFi Link 4965AGN IEEE 802.11n adapter"
f_network "ix%d" "Intel Etherexpress Ethernet card"
-f_network "ixgb%d" "Intel(R) PRO/10Gb Ethernet card"
f_network "ixgbe%d" "Intel(R) PRO/10Gb Ethernet card"
f_network "jme%d" "JMicron JMC250 Gigabit/JMC260 Fast Ethernet"
f_network "kue%d" "Kawasaki LSI USB Ethernet adapter"

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