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diff --git a/en_US.ISO8859-1/htdocs/news/status/report-2020-04-2020-06.xml b/en_US.ISO8859-1/htdocs/news/status/report-2020-04-2020-06.xml
--- a/en_US.ISO8859-1/htdocs/news/status/report-2020-04-2020-06.xml
+++ b/en_US.ISO8859-1/htdocs/news/status/report-2020-04-2020-06.xml
@@ -1869,8 +1869,8 @@
</p>
<p>Much of this effort has been focused on preparing CheriBSD on
CHERI-RISC-V for inclusion as a demonstrator system in DARPA's Finding
-Exploits to Thwart Tampering (<a href='https://fett.darpa.mil)'>FETT</a> Bug Bounty
-program).
+Exploits to Thwart Tampering (<a href='https://fett.darpa.mil'>FETT</a>) Bug Bounty
+program.
</p>
<p>In addition, work has begun this quarter on porting CheriBSD to Arm's
Morello SoC. Morello is a prototype demonstrator board which adds CHERI
diff --git a/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml b/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml
--- a/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml
+++ b/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml
@@ -1808,14 +1808,14 @@
<h3>CHERI Documentation and Exercises</h3>
<ul>
-<li><p>We have released [Capability Hardware Enhanced RISC Instructions: CHERI
- Instruction-Set Architecture (Version 8)](https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf).
+ <li><p>We have released <a href='https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf'>Capability
+ Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 8)</a>.
Notable changes include promotion of CHERI-RISC-V to non-experimental
and discussion of Arm's Morello prototype.
</p>
</li>
-<li><p>We have developed a set of [Adversarial CHERI Exercises and
- Missions](https://ctsrd-cheri.github.io/cheri-exercises) to introduce security
+<li><p>We have developed a set of <a href='https://ctsrd-cheri.github.io/cheri-exercises'>Adversarial
+ CHERI Exercises and Missions</a> to introduce security
researchers to CHERI protections.
</p></li></ul>
</body></project>
diff --git a/en_US.ISO8859-1/htdocs/news/status/report-2020-10-2020-12.xml b/en_US.ISO8859-1/htdocs/news/status/report-2020-10-2020-12.xml
--- a/en_US.ISO8859-1/htdocs/news/status/report-2020-10-2020-12.xml
+++ b/en_US.ISO8859-1/htdocs/news/status/report-2020-10-2020-12.xml
@@ -2287,11 +2287,11 @@
<title>CheriBSD</title>
<links>
-<url href='http://www.cheri-cpu.org'>CHERI Project homepage</url>
-<url href='https://github.com/CTSRD-CHERI/cheribsd'>CHERi github repo</url>
-<url href='https://www.morello-project.org'>Morello Platform landing page</url>
+<url href='http://www.cheri-cpu.org'>CHERI Project Homepage</url>
+<url href='https://github.com/CTSRD-CHERI/cheribsd'>CHERI GitHub Repo</url>
+<url href='https://www.morello-project.org'>Morello Platform Landing Page</url>
<url href='https://morello-dist.cl.cam.ac.uk'>CheriBSD Morello Developer Preview</url>
-<url href='https://developer.arm.com/architectures/cpu-architecture/a-profile/morello'>ARM Morello Program</url>
+<url href='https://developer.arm.com/architectures/cpu-architecture/a-profile/morello'>Arm Morello Program</url>
</links>
<contact>

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