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Index: head/sys/riscv/include/cpufunc.h
===================================================================
--- head/sys/riscv/include/cpufunc.h
+++ head/sys/riscv/include/cpufunc.h
@@ -37,16 +37,16 @@
#ifndef _MACHINE_CPUFUNC_H_
#define _MACHINE_CPUFUNC_H_
-#ifdef _KERNEL
-
-#include <machine/riscvreg.h>
-
static __inline void
breakpoint(void)
{
__asm("ebreak");
}
+
+#ifdef _KERNEL
+
+#include <machine/riscvreg.h>
static __inline register_t
intr_disable(void)
Index: head/tests/sys/kern/ptrace_test.c
===================================================================
--- head/tests/sys/kern/ptrace_test.c
+++ head/tests/sys/kern/ptrace_test.c
@@ -55,7 +55,7 @@
* Architectures with a user-visible breakpoint().
*/
#if defined(__amd64__) || defined(__i386__) || defined(__mips__) || \
- defined(__sparc64__)
+ defined(__riscv) || defined(__sparc64__)
#define HAVE_BREAKPOINT
#endif
@@ -67,6 +67,8 @@
#define SKIP_BREAK(reg)
#elif defined(__mips__)
#define SKIP_BREAK(reg) ((reg)->r_regs[PC] += 4)
+#elif defined(__riscv)
+#define SKIP_BREAK(reg) ((reg)->sepc += 4)
#elif defined(__sparc64__)
#define SKIP_BREAK(reg) do { \
(reg)->r_tpc = (reg)->r_tnpc + 4; \

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