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D11750.id31417.diff
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Index: head/sys/dev/pci/pci.c
===================================================================
--- head/sys/dev/pci/pci.c
+++ head/sys/dev/pci/pci.c
@@ -2902,13 +2902,21 @@
* Determine the BAR's length by writing all 1's. The bottom
* log_2(size) bits of the BAR will stick as 0 when we read
* the value back.
+ *
+ * NB: according to the PCI Local Bus Specification, rev. 3.0:
+ * "Software writes 0FFFFFFFFh to both registers, reads them back,
+ * and combines the result into a 64-bit value." (section 6.2.5.1)
+ *
+ * Writes to both registers must be performed before attempting to
+ * read back the size value.
*/
+ testval = 0;
pci_write_config(dev, reg, 0xffffffff, 4);
- testval = pci_read_config(dev, reg, 4);
if (ln2range == 64) {
pci_write_config(dev, reg + 4, 0xffffffff, 4);
testval |= (pci_addr_t)pci_read_config(dev, reg + 4, 4) << 32;
}
+ testval |= pci_read_config(dev, reg, 4);
/*
* Restore the original value of the BAR. We may have reprogrammed
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D11750: pci: fix write order when sizing BARs
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