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diff --git a/sys/dev/nvme/nvme_pci.c b/sys/dev/nvme/nvme_pci.c
--- a/sys/dev/nvme/nvme_pci.c
+++ b/sys/dev/nvme/nvme_pci.c
@@ -151,24 +151,29 @@
static int
nvme_ctrlr_allocate_bar(struct nvme_controller *ctrlr)
{
+ int activate_msi_bar = 0;
+ int activate_pba_bar = 0;
+
ctrlr->resource_id = PCIR_BAR(0);
ctrlr->msix_table_resource_id = -1;
ctrlr->msix_table_resource = NULL;
ctrlr->msix_pba_resource_id = -1;
ctrlr->msix_pba_resource = NULL;
+ /*
+ * Using RF_ACTIVE will set the Memory Space bit in the PCI command register.
+ * The remaining BARs will get mapped in before they've been programmed with
+ * an address. To avoid this we'll not set this flag and instead call
+ * bus_activate_resource() after all the BARs have been programmed.
+ */
ctrlr->resource = bus_alloc_resource_any(ctrlr->dev, SYS_RES_MEMORY,
- &ctrlr->resource_id, RF_ACTIVE);
+ &ctrlr->resource_id, 0);
if (ctrlr->resource == NULL) {
nvme_printf(ctrlr, "unable to allocate pci resource\n");
return (ENOMEM);
}
- ctrlr->bus_tag = rman_get_bustag(ctrlr->resource);
- ctrlr->bus_handle = rman_get_bushandle(ctrlr->resource);
- ctrlr->regs = (struct nvme_registers *)ctrlr->bus_handle;
-
/*
* The NVMe spec allows for the MSI-X tables to be placed behind
* BAR 4 and/or 5, separate from the control/doorbell registers.
@@ -180,23 +185,44 @@
if (ctrlr->msix_table_resource_id >= 0 &&
ctrlr->msix_table_resource_id != ctrlr->resource_id) {
ctrlr->msix_table_resource = bus_alloc_resource_any(ctrlr->dev,
- SYS_RES_MEMORY, &ctrlr->msix_table_resource_id, RF_ACTIVE);
+ SYS_RES_MEMORY, &ctrlr->msix_table_resource_id, 0);
if (ctrlr->msix_table_resource == NULL) {
nvme_printf(ctrlr, "unable to allocate msi-x table resource\n");
return (ENOMEM);
}
+ activate_msi_bar = 1;
}
if (ctrlr->msix_pba_resource_id >= 0 &&
ctrlr->msix_pba_resource_id != ctrlr->resource_id &&
ctrlr->msix_pba_resource_id != ctrlr->msix_table_resource_id) {
ctrlr->msix_pba_resource = bus_alloc_resource_any(ctrlr->dev,
- SYS_RES_MEMORY, &ctrlr->msix_pba_resource_id, RF_ACTIVE);
+ SYS_RES_MEMORY, &ctrlr->msix_pba_resource_id, 0);
if (ctrlr->msix_pba_resource == NULL) {
nvme_printf(ctrlr, "unable to allocate msi-x pba resource\n");
return (ENOMEM);
}
+ activate_pba_bar = 1;
}
+ if (bus_activate_resource(ctrlr->dev, ctrlr->resource)) {
+ nvme_printf(ctrlr, "unable to activate pci resource\n");
+ return (ENOMEM);
+ }
+ if (activate_msi_bar &&
+ bus_activate_resource(ctrlr->dev, ctrlr->msix_table_resource)) {
+ nvme_printf(ctrlr, "unable to activate msi-x table resource\n");
+ return (ENOMEM);
+ }
+ if (activate_pba_bar &&
+ bus_activate_resource(ctrlr->dev, ctrlr->msix_pba_resource)) {
+ nvme_printf(ctrlr, "unable to activate msi-x pba resource\n");
+ return (ENOMEM);
+ }
+
+ ctrlr->bus_tag = rman_get_bustag(ctrlr->resource);
+ ctrlr->bus_handle = rman_get_bushandle(ctrlr->resource);
+ ctrlr->regs = (struct nvme_registers *)ctrlr->bus_handle;
+
return (0);
}

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