Page MenuHomeFreeBSD
Files F144738109

D23558.diff
No OneTemporary
Actions

D23558.diff
View Options

Index: head/sys/dev/amdsbwd/amd_chipset.h
===================================================================
--- head/sys/dev/amdsbwd/amd_chipset.h
+++ head/sys/dev/amdsbwd/amd_chipset.h
@@ -146,3 +146,5 @@
#define AMDCZ_SMBUS_DEVID 0x790b1022
#define AMDCZ49_SMBUS_REVID 0x49
+#define HYGONCZ_SMBUS_DEVID 0x790b1d94
+
Index: head/sys/dev/amdsbwd/amdsbwd.c
===================================================================
--- head/sys/dev/amdsbwd/amdsbwd.c
+++ head/sys/dev/amdsbwd/amdsbwd.c
@@ -60,6 +60,8 @@
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
+#include <machine/cputypes.h>
+#include <machine/md_var.h>
#include <machine/resource.h>
#include <sys/watchdog.h>
@@ -269,7 +271,8 @@
return;
if (pci_get_devid(smb_dev) != AMDSB_SMBUS_DEVID &&
pci_get_devid(smb_dev) != AMDFCH_SMBUS_DEVID &&
- pci_get_devid(smb_dev) != AMDCZ_SMBUS_DEVID)
+ pci_get_devid(smb_dev) != AMDCZ_SMBUS_DEVID &&
+ pci_get_devid(smb_dev) != HYGONCZ_SMBUS_DEVID)
return;
child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, "amdsbwd", -1);
@@ -378,6 +381,7 @@
amdsbwd_probe_fch41(device_t dev, struct resource *pmres, uint32_t *addr)
{
uint8_t val;
+ char buf[36];
val = pmio_read(pmres, AMDFCH41_PM_ISA_CTRL);
if ((val & AMDFCH41_MMIO_EN) != 0) {
@@ -416,7 +420,9 @@
amdsbwd_verbose_printf(dev, "AMDFCH41_PM_DECODE_EN3 value = %#04x\n",
val);
#endif
- device_set_desc(dev, "AMD FCH Rev 41h+ Watchdog Timer");
+ snprintf(buf, sizeof(buf), "%s FCH Rev 41h+ Watchdog Timer",
+ cpu_vendor_id == CPU_VENDOR_HYGON ? "Hygon" : "AMD");
+ device_set_desc_copy(dev, buf);
}
static int
Index: head/sys/dev/intpm/intpm.c
===================================================================
--- head/sys/dev/intpm/intpm.c
+++ head/sys/dev/intpm/intpm.c
@@ -102,6 +102,7 @@
{ AMDSB_SMBUS_DEVID, "AMD SB600/7xx/8xx/9xx SMBus Controller" },
{ AMDFCH_SMBUS_DEVID, "AMD FCH SMBus Controller" },
{ AMDCZ_SMBUS_DEVID, "AMD FCH SMBus Controller" },
+ { HYGONCZ_SMBUS_DEVID, "Hygon FCH SMBus Controller" },
};
static int
@@ -243,6 +244,7 @@
break;
case AMDFCH_SMBUS_DEVID:
case AMDCZ_SMBUS_DEVID:
+ case HYGONCZ_SMBUS_DEVID:
sc->sb8xx = 1;
break;
}

File Metadata

Mime Type
text/plain
Expires
Thu, Feb 12, 10:33 PM (2 h, 4 m)
Storage Engine
blob
Storage Format
Raw Data
Storage Handle
28670946
Default Alt Text
D23558.diff (2 KB)

Event Timeline