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diff --git a/sys/arm64/arm64/disassem.c b/sys/arm64/arm64/disassem.c
--- a/sys/arm64/arm64/disassem.c
+++ b/sys/arm64/arm64/disassem.c
@@ -281,6 +281,46 @@
TYPE_04, 0 }, /* cmp extended register */
{ "subs", "SF(1)|1101011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|RD(5)",
TYPE_04, 0 }, /* subs extended register */
+ { "adc", "SF(1)|0011010000|RM(5)|000000|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "adcs", "SF(1)|0111010000|RM(5)|000000|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "cls", "SF(1)|101101011000000000101|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "clz", "SF(1)|101101011000000000100|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "asr", "SF(1)|0011010110|RM(5)|001010|RN(5)|RD(5)",
+ TYPE_01, 0 }, /* asr register */
+ { "lsl", "SF(1)|0011010110|RM(5)|001000|RN(5)|RD(5)",
+ TYPE_01, 0 }, /* lsl register */
+ { "lsr", "SF(1)|0011010110|RM(5)|001001|RN(5)|RD(5)",
+ TYPE_01, 0 }, /* lsr register */
+ { "ror", "SF(1)|0011010110|RM(5)|001011|RN(5)|RD(5)",
+ TYPE_01, 0 }, /* ror register */
+ { "rbit", "SF(1)|101101011000000000000|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "rev", "SF(1)|101101011000000000011|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "rev16", "SF(1)|101101011000000000001|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "rev32", "1101101011000000000010|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "ngc", "SF(1)|1011010000|RM(5)|00000011111|RD(5)",
+ TYPE_01, 0 }, /* alias of sbc */
+ { "sbc", "SF(1)|1011010000|RM(5)|000000|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "ngcs", "SF(1)|1111010000|RM(5)|000000|11111|RD(5)",
+ TYPE_01, 0 }, /* alias of sbcs */
+ { "sbcs", "SF(1)|1111010000|RM(5)|000000|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "sdiv", "SF(1)|0011010110|RM(5)|000011|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "smulh", "10011011010|RM(5)|011111|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "udiv", "SF(1)|0011010110|RM(5)|000010|RN(5)|RD(5)",
+ TYPE_01, 0 },
+ { "umulh", "10011011110|RM(5)|011111|RN(5)|RD(5)",
+ TYPE_01, 0 },
{ NULL, NULL }
};

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