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D6311.id16302.diff
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Index: head/sys/arm/allwinner/a10_ehci.c
===================================================================
--- head/sys/arm/allwinner/a10_ehci.c
+++ head/sys/arm/allwinner/a10_ehci.c
@@ -113,6 +113,7 @@
{ "allwinner,sun6i-a31-ehci", (uintptr_t)&a31_ehci_conf },
{ "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf },
{ "allwinner,sun8i-a83t-ehci", (uintptr_t)&a31_ehci_conf },
+ { "allwinner,sun8i-h3-ehci", (uintptr_t)&a31_ehci_conf },
{ NULL, (uintptr_t)NULL }
};
Index: head/sys/arm/allwinner/a10_gpio.c
===================================================================
--- head/sys/arm/allwinner/a10_gpio.c
+++ head/sys/arm/allwinner/a10_gpio.c
@@ -99,6 +99,12 @@
extern const struct allwinner_padconf a31_r_padconf;
#endif
+/* Defined in h3_padconf.c */
+#ifdef SOC_ALLWINNER_H3
+extern const struct allwinner_padconf h3_padconf;
+extern const struct allwinner_padconf h3_r_padconf;
+#endif
+
/* Defined in a83t_padconf.c */
#ifdef SOC_ALLWINNER_A83T
extern const struct allwinner_padconf a83t_padconf;
@@ -125,6 +131,10 @@
{"allwinner,sun8i-a83t-pinctrl", (uintptr_t)&a83t_padconf},
{"allwinner,sun8i-a83t-r-pinctrl", (uintptr_t)&a83t_r_padconf},
#endif
+#ifdef SOC_ALLWINNER_H3
+ {"allwinner,sun8i-h3-pinctrl", (uintptr_t)&h3_padconf},
+ {"allwinner,sun8i-h3-r-pinctrl", (uintptr_t)&h3_r_padconf},
+#endif
{NULL, 0}
};
Index: head/sys/arm/allwinner/allwinner_machdep.h
===================================================================
--- head/sys/arm/allwinner/allwinner_machdep.h
+++ head/sys/arm/allwinner/allwinner_machdep.h
@@ -34,6 +34,7 @@
#define ALLWINNERSOC_A13 0x13000000
#define ALLWINNERSOC_A10S 0x10000001
#define ALLWINNERSOC_A20 0x20000000
+#define ALLWINNERSOC_H3 0x30000000
#define ALLWINNERSOC_A31 0x31000000
#define ALLWINNERSOC_A31S 0x31000001
#define ALLWINNERSOC_A83T 0x83000000
Index: head/sys/arm/allwinner/allwinner_machdep.c
===================================================================
--- head/sys/arm/allwinner/allwinner_machdep.c
+++ head/sys/arm/allwinner/allwinner_machdep.c
@@ -103,6 +103,15 @@
return (0);
}
+static int
+h3_attach(platform_t plat)
+{
+ soc_type = ALLWINNERSOC_H3;
+ soc_family = ALLWINNERSOC_SUN8I;
+
+ return (0);
+}
+
static vm_offset_t
allwinner_lastaddr(platform_t plat)
{
@@ -220,6 +229,21 @@
FDT_PLATFORM_DEF(a83t, "a83t", 0, "allwinner,sun8i-a83t", 200);
#endif
+#if defined(SOC_ALLWINNER_H3)
+static platform_method_t h3_methods[] = {
+ PLATFORMMETHOD(platform_attach, h3_attach),
+ PLATFORMMETHOD(platform_lastaddr, allwinner_lastaddr),
+ PLATFORMMETHOD(platform_devmap_init, allwinner_devmap_init),
+
+#ifdef SMP
+ PLATFORMMETHOD(platform_mp_start_ap, aw_mp_start_ap),
+ PLATFORMMETHOD(platform_mp_setmaxid, aw_mp_setmaxid),
+#endif
+ PLATFORMMETHOD_END,
+};
+FDT_PLATFORM_DEF(h3, "h3", 0, "allwinner,sun8i-h3", 200);
+#endif
+
u_int
allwinner_soc_type(void)
{
Index: head/sys/arm/allwinner/aw_ccu.c
===================================================================
--- head/sys/arm/allwinner/aw_ccu.c
+++ head/sys/arm/allwinner/aw_ccu.c
@@ -80,6 +80,7 @@
{ "allwinner,sun6i-a31", CLOCK_CCU },
{ "allwinner,sun6i-a31s", CLOCK_CCU },
{ "allwinner,sun8i-a83t", CLOCK_CCU|CLOCK_PRCM|CLOCK_SYSCTRL },
+ { "allwinner,sun8i-h3", CLOCK_CCU },
{ NULL, 0 }
};
Index: head/sys/arm/allwinner/aw_usbphy.c
===================================================================
--- head/sys/arm/allwinner/aw_usbphy.c
+++ head/sys/arm/allwinner/aw_usbphy.c
@@ -56,6 +56,7 @@
{ "allwinner,sun6i-a31-usb-phy", 1 },
{ "allwinner,sun7i-a20-usb-phy", 1 },
{ "allwinner,sun8i-a83t-usb-phy", 1 },
+ { "allwinner,sun8i-h3-usb-phy", 1 },
{ NULL, 0 }
};
Index: head/sys/arm/allwinner/clk/aw_gate.c
===================================================================
--- head/sys/arm/allwinner/clk/aw_gate.c
+++ head/sys/arm/allwinner/clk/aw_gate.c
@@ -81,6 +81,9 @@
{ "allwinner,sun8i-a83t-apb0-gates-clk",
(uintptr_t)"Allwinner APB0 Clock Gates" },
+ { "allwinner,sun8i-h3-bus-gates-clk",
+ (uintptr_t)"Allwinner Bus Clock Gates"},
+
{ "allwinner,sun9i-a80-apbs-gates-clk",
(uintptr_t)"Allwinner APBS Clock Gates" },
Index: head/sys/arm/allwinner/clk/aw_pll.c
===================================================================
--- head/sys/arm/allwinner/clk/aw_pll.c
+++ head/sys/arm/allwinner/clk/aw_pll.c
@@ -101,6 +101,15 @@
#define A10_PLL2_POST_DIV (0xf << 26)
+#define A23_PLL1_FACTOR_N (0x1f << 8)
+#define A23_PLL1_FACTOR_N_SHIFT 8
+#define A23_PLL1_FACTOR_K (0x3 << 4)
+#define A23_PLL1_FACTOR_K_SHIFT 4
+#define A23_PLL1_FACTOR_M (0x3 << 0)
+#define A23_PLL1_FACTOR_M_SHIFT 0
+#define A23_PLL1_FACTOR_P (0x3 << 16)
+#define A23_PLL1_FACTOR_P_SHIFT 16
+
#define A31_PLL1_LOCK (1 << 28)
#define A31_PLL1_CPU_SIGMA_DELTA_EN (1 << 24)
#define A31_PLL1_FACTOR_N (0x1f << 8)
@@ -150,6 +159,7 @@
AWPLL_A10_PLL3,
AWPLL_A10_PLL5,
AWPLL_A10_PLL6,
+ AWPLL_A23_PLL1,
AWPLL_A31_PLL1,
AWPLL_A31_PLL6,
AWPLL_A80_PLL4,
@@ -452,6 +462,25 @@
}
static int
+a23_pll1_recalc(struct aw_pll_sc *sc, uint64_t *freq)
+{
+ uint32_t val, m, n, k, p;
+
+ DEVICE_LOCK(sc);
+ PLL_READ(sc, &val);
+ DEVICE_UNLOCK(sc);
+
+ m = ((val & A23_PLL1_FACTOR_M) >> A23_PLL1_FACTOR_M_SHIFT) + 1;
+ k = ((val & A23_PLL1_FACTOR_K) >> A23_PLL1_FACTOR_K_SHIFT) + 1;
+ n = ((val & A23_PLL1_FACTOR_N) >> A23_PLL1_FACTOR_N_SHIFT) + 1;
+ p = ((val & A23_PLL1_FACTOR_P) >> A23_PLL1_FACTOR_P_SHIFT) + 1;
+
+ *freq = (*freq * n * k) / (m * p);
+
+ return (0);
+}
+
+static int
a31_pll1_recalc(struct aw_pll_sc *sc, uint64_t *freq)
{
uint32_t val, m, n, k;
@@ -562,6 +591,7 @@
PLL(AWPLL_A10_PLL3, a10_pll3_recalc, a10_pll3_set_freq, a10_pll3_init),
PLL(AWPLL_A10_PLL5, a10_pll5_recalc, NULL, NULL),
PLL(AWPLL_A10_PLL6, a10_pll6_recalc, a10_pll6_set_freq, a10_pll6_init),
+ PLL(AWPLL_A23_PLL1, a23_pll1_recalc, NULL, NULL),
PLL(AWPLL_A31_PLL1, a31_pll1_recalc, NULL, NULL),
PLL(AWPLL_A31_PLL6, a31_pll6_recalc, NULL, a31_pll6_init),
PLL(AWPLL_A80_PLL4, a80_pll4_recalc, NULL, NULL),
@@ -575,6 +605,7 @@
{ "allwinner,sun4i-a10-pll6-clk", AWPLL_A10_PLL6 },
{ "allwinner,sun6i-a31-pll1-clk", AWPLL_A31_PLL1 },
{ "allwinner,sun6i-a31-pll6-clk", AWPLL_A31_PLL6 },
+ { "allwinner,sun8i-a23-pll1-clk", AWPLL_A23_PLL1 },
{ "allwinner,sun9i-a80-pll4-clk", AWPLL_A80_PLL4 },
{ NULL, 0 }
};
Index: head/sys/arm/allwinner/clk/aw_usbclk.c
===================================================================
--- head/sys/arm/allwinner/clk/aw_usbclk.c
+++ head/sys/arm/allwinner/clk/aw_usbclk.c
@@ -63,17 +63,21 @@
AW_A10_USBCLK = 1,
AW_A31_USBCLK,
AW_A83T_USBCLK,
+ AW_H3_USBCLK,
};
static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun4i-a10-usb-clk", AW_A10_USBCLK },
{ "allwinner,sun6i-a31-usb-clk", AW_A31_USBCLK },
{ "allwinner,sun8i-a83t-usb-clk", AW_A83T_USBCLK },
+ { "allwinner,sun8i-h3-usb-clk", AW_H3_USBCLK },
{ NULL, 0 }
};
/* Clock indices for A10, as there is no clock-indices property in the DT */
static uint32_t aw_usbclk_indices_a10[] = { 6, 7, 8 };
+/* Clock indices for H3, as there is no clock-indices property in the DT */
+static uint32_t aw_usbclk_indices_h3[] = { 8, 9, 10, 11, 16, 17, 18, 19 };
struct aw_usbclk_softc {
bus_addr_t reg;
@@ -193,6 +197,8 @@
if (indices == NULL && type == AW_A10_USBCLK)
indices = aw_usbclk_indices_a10;
+ else if (indices == NULL && type == AW_H3_USBCLK)
+ indices = aw_usbclk_indices_h3;
error = clk_get_by_ofw_index(dev, 0, &clk_parent);
if (error != 0) {
Index: head/sys/arm/allwinner/h3/files.h3
===================================================================
--- head/sys/arm/allwinner/h3/files.h3
+++ head/sys/arm/allwinner/h3/files.h3
@@ -0,0 +1,4 @@
+# $FreeBSD$
+
+arm/allwinner/h3/h3_padconf.c standard
+arm/allwinner/h3/h3_r_padconf.c standard
Index: head/sys/arm/allwinner/h3/h3_padconf.c
===================================================================
--- head/sys/arm/allwinner/h3/h3_padconf.c
+++ head/sys/arm/allwinner/h3/h3_padconf.c
@@ -0,0 +1,147 @@
+/*-
+ * Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+#ifdef SOC_ALLWINNER_H3
+
+const static struct allwinner_pins h3_pins[] = {
+ {"PA0", 0, 0, {"gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "eint", NULL}},
+ {"PA1", 0, 1, {"gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "eint", NULL}},
+ {"PA2", 0, 2, {"gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "eint", NULL}},
+ {"PA3", 0, 3, {"gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "eint", NULL}},
+ {"PA4", 0, 4, {"gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, "eint", NULL}},
+ {"PA5", 0, 5, {"gpio_in", "gpio_out", "uart0", "pwm0", NULL, NULL, "eint", NULL}},
+ {"PA6", 0, 6, {"gpio_in", "gpio_out", "sim", NULL, NULL, NULL, "eint", NULL}},
+ {"PA7", 0, 7, {"gpio_in", "gpio_out", "sim", NULL, NULL, NULL, "eint", NULL}},
+ {"PA8", 0, 8, {"gpio_in", "gpio_out", "sim", NULL, NULL, NULL, "eint", NULL}},
+ {"PA9", 0, 9, {"gpio_in", "gpio_out", "sim", NULL, NULL, NULL, "eint", NULL}},
+ {"PA10", 0, 10, {"gpio_in", "gpio_out", "sim", NULL, NULL, NULL, "eint", NULL}},
+ {"PA11", 0, 11, {"gpio_in", "gpio_out", "i2c0", "di", NULL, NULL, "eint", NULL}},
+ {"PA12", 0, 12, {"gpio_in", "gpio_out", "i2c0", "di", NULL, NULL, "eint", NULL}},
+ {"PA13", 0, 13, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PA14", 0, 14, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PA15", 0, 15, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PA16", 0, 16, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint", NULL}},
+ {"PA17", 0, 17, {"gpio_in", "gpio_out", "spdif", NULL, NULL, NULL, "eint", NULL}},
+ {"PA18", 0, 18, {"gpio_in", "gpio_out", "i2s0", "i2c1", NULL, NULL, "eint", NULL}},
+ {"PA19", 0, 19, {"gpio_in", "gpio_out", "i2s0", "i2c1", NULL, NULL, "eint", NULL}},
+ {"PA20", 0, 20, {"gpio_in", "gpio_out", "i2s0", "sim", NULL, NULL, "eint", NULL}},
+ {"PA21", 0, 21, {"gpio_in", "gpio_out", "i2s0", "sim", NULL, NULL, "eint", NULL}},
+
+ {"PC0", 2, 0, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC1", 2, 1, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC2", 2, 2, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC3", 2, 3, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
+ {"PC4", 2, 4, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+ {"PC5", 2, 5, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC6", 2, 6, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC7", 2, 7, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
+ {"PC8", 2, 8, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC9", 2, 9, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC10", 2, 10, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC11", 2, 11, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC12", 2, 12, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC13", 2, 13, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC14", 2, 14, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC15", 2, 15, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+ {"PC16", 2, 16, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
+
+ {"PD0", 3, 0, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD1", 3, 1, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD2", 3, 2, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD3", 3, 3, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD4", 3, 4, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD5", 3, 5, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD6", 3, 6, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD7", 3, 7, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD8", 3, 8, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD9", 3, 9, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD10", 3, 10, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD11", 3, 11, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD12", 3, 12, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD13", 3, 13, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD14", 3, 14, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD15", 3, 15, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD16", 3, 16, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+ {"PD17", 3, 17, {"gpio_in", "gpio_out", "emac", NULL, NULL, NULL, NULL, NULL}},
+
+ {"PE0", 4, 0, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE1", 4, 1, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE2", 4, 2, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE3", 4, 3, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE4", 4, 4, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE5", 4, 5, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE6", 4, 6, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE7", 4, 7, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE8", 4, 8, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE9", 4, 9, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE10", 4, 10, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE11", 4, 11, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, NULL, NULL}},
+ {"PE12", 4, 12, {"gpio_in", "gpio_out", "csi", "i2c2", NULL, NULL, NULL, NULL}},
+ {"PE13", 4, 13, {"gpio_in", "gpio_out", "csi", "i2c2", NULL, NULL, NULL, NULL}},
+ {"PE14", 4, 14, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
+ {"PE15", 4, 15, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
+
+ {"PF0", 5, 0, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
+ {"PF1", 5, 1, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
+ {"PF2", 5, 2, {"gpio_in", "gpio_out", "mmc0", "uart0", NULL, NULL, NULL, NULL}},
+ {"PF3", 5, 3, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
+ {"PF4", 5, 4, {"gpio_in", "gpio_out", "mmc0", "uart0", NULL, NULL, NULL, NULL}},
+ {"PF5", 5, 5, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
+ {"PF6", 5, 6, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
+
+ {"PG0", 6, 0, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG1", 6, 1, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG2", 6, 2, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG3", 6, 3, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG4", 6, 4, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG5", 6, 5, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG6", 6, 6, {"gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG7", 6, 7, {"gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG8", 6, 8, {"gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG9", 6, 9, {"gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG10", 6, 10, {"gpio_in", "gpio_out", "i2s1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG11", 6, 11, {"gpio_in", "gpio_out", "i2s1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG12", 6, 11, {"gpio_in", "gpio_out", "i2s1", NULL, NULL, NULL, NULL, "eint"}},
+ {"PG13", 6, 11, {"gpio_in", "gpio_out", "i2s1", NULL, NULL, NULL, NULL, "eint"}},
+};
+
+const struct allwinner_padconf h3_padconf = {
+ .npins = nitems(h3_pins),
+ .pins = h3_pins,
+};
+
+#endif /* SOC_ALLWINNER_H3 */
Index: head/sys/arm/allwinner/h3/h3_r_padconf.c
===================================================================
--- head/sys/arm/allwinner/h3/h3_r_padconf.c
+++ head/sys/arm/allwinner/h3/h3_r_padconf.c
@@ -0,0 +1,60 @@
+/*-
+ * Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/types.h>
+
+#include <arm/allwinner/allwinner_pinctrl.h>
+
+#ifdef SOC_ALLWINNER_H3
+
+const static struct allwinner_pins h3_r_pins[] = {
+ {"PL0", 0, 0, {"gpio_in", "gpio_out", "s_twi", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL1", 0, 1, {"gpio_in", "gpio_out", "s_twi", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL2", 0, 2, {"gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL3", 0, 3, {"gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL4", 0, 4, {"gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL5", 0, 5, {"gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL6", 0, 6, {"gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL7", 0, 7, {"gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL8", 0, 8, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, "eint"}},
+ {"PL9", 0, 9, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, "eint"}},
+ {"PL10", 0, 10, {"gpio_in", "gpio_out", "s_pwm", NULL, NULL, NULL, NULL, "eint"}},
+ {"PL11", 0, 11, {"gpio_in", "gpio_out", "s_cir_rx", NULL, NULL, NULL, NULL, "eint"}},
+};
+
+const struct allwinner_padconf h3_r_padconf = {
+ .npins = nitems(h3_r_pins),
+ .pins = h3_r_pins,
+};
+
+#endif /* SOC_ALLWINNER_H3 */
Index: head/sys/arm/allwinner/h3/std.h3
===================================================================
--- head/sys/arm/allwinner/h3/std.h3
+++ head/sys/arm/allwinner/h3/std.h3
@@ -0,0 +1,15 @@
+# Allwinner H3 common options
+#$FreeBSD$
+
+cpu CPU_CORTEXA
+machine arm armv6
+makeoptions CONF_CFLAGS="-march=armv7a"
+
+makeoptions KERNVIRTADDR=0xc0200000
+options KERNVIRTADDR=0xc0200000
+
+options IPI_IRQ_START=0
+options IPI_IRQ_END=15
+
+files "../allwinner/files.allwinner"
+files "../allwinner/h3/files.h3"
Index: head/sys/arm/allwinner/std.allwinner
===================================================================
--- head/sys/arm/allwinner/std.allwinner
+++ head/sys/arm/allwinner/std.allwinner
@@ -15,3 +15,4 @@
files "../allwinner/a20/files.a20"
files "../allwinner/a31/files.a31"
files "../allwinner/a83t/files.a83t"
+files "../allwinner/h3/files.h3"
Index: head/sys/arm/conf/ALLWINNER
===================================================================
--- head/sys/arm/conf/ALLWINNER
+++ head/sys/arm/conf/ALLWINNER
@@ -29,6 +29,7 @@
options SOC_ALLWINNER_A31
options SOC_ALLWINNER_A31S
options SOC_ALLWINNER_A83T
+options SOC_ALLWINNER_H3
options HZ=100
options SCHED_ULE # ULE scheduler
Index: head/sys/conf/options.arm
===================================================================
--- head/sys/conf/options.arm
+++ head/sys/conf/options.arm
@@ -45,6 +45,7 @@
SOC_ALLWINNER_A31 opt_global.h
SOC_ALLWINNER_A31S opt_global.h
SOC_ALLWINNER_A83T opt_global.h
+SOC_ALLWINNER_H3 opt_global.h
SOC_BCM2835 opt_global.h
SOC_BCM2836 opt_global.h
SOC_IMX51 opt_global.h
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