D28746.id84141.diff
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	Index: sys/dev/ichiic/ig4_acpi.c
	===================================================================
	--- sys/dev/ichiic/ig4_acpi.c
	+++ sys/dev/ichiic/ig4_acpi.c
	@@ -89,8 +89,16 @@
	sc = device_get_softc(dev);

	sc->dev = dev;
	- /* All the HIDs matched are Atom SOCs. */
	- sc->version = IG4_ATOM;
	+ if (acpi_MatchHid(acpi_get_handle(dev), "APMC0D0F") !=
	+ ACPI_MATCHHID_NOMATCH) {
	+ sc->version = IG4_EMAG;
	+ } else {
	+ /*
	+ * All the other HIDs matched are compatible with Atom
	+ * mode.
	+ */
	+ sc->version = IG4_ATOM;
	+ }
	sc->regs_rid = 0;
	sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
	&sc->regs_rid, RF_ACTIVE);
	Index: sys/dev/ichiic/ig4_iic.c
	===================================================================
	--- sys/dev/ichiic/ig4_iic.c
	+++ sys/dev/ichiic/ig4_iic.c
	@@ -91,8 +91,11 @@
	* Ig4 hardware parameters except Haswell are taken from intel_lpss driver
	*/
	static const struct ig4_hw ig4iic_hw[] = {
	- [IG4_HASWELL] = {
	+ [IG4_EMAG] = {
	.ic_clock_rate = 100, /* MHz */
	+ },
	+ [IG4_HASWELL] = {
	+ .ic_clock_rate = 100,
	.sda_hold_time = 90, /* nsec */
	.txfifo_depth = 32,
	.rxfifo_depth = 32,
	Index: sys/dev/ichiic/ig4_var.h
	===================================================================
	--- sys/dev/ichiic/ig4_var.h
	+++ sys/dev/ichiic/ig4_var.h
	@@ -44,6 +44,7 @@
	#include "iicbus_if.h"

	enum ig4_vers {
	+ IG4_EMAG,
	IG4_HASWELL,
	IG4_ATOM,
	IG4_SKYLAKE,