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D4301.id.diff
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D4301.id.diff
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Index: head/sys/dev/ahci/ahci.h
===================================================================
--- head/sys/dev/ahci/ahci.h
+++ head/sys/dev/ahci/ahci.h
@@ -597,6 +597,7 @@
#define AHCI_Q_1MSI 0x00020000
#define AHCI_Q_FORCE_PI 0x00040000
#define AHCI_Q_RESTORE_CAP 0x00080000
+#define AHCI_Q_NOMSIX 0x00100000
#define AHCI_Q_BIT_STRING \
"\020" \
@@ -619,7 +620,8 @@
"\021ABAR0" \
"\0221MSI" \
"\023FORCE_PI" \
- "\024RESTORE_CAP"
+ "\024RESTORE_CAP" \
+ "\025NOMSIX"
int ahci_attach(device_t dev);
int ahci_detach(device_t dev);
Index: head/sys/dev/ahci/ahci_pci.c
===================================================================
--- head/sys/dev/ahci/ahci_pci.c
+++ head/sys/dev/ahci/ahci_pci.c
@@ -293,7 +293,7 @@
{0x11851039, 0x00, "SiS 968", 0},
{0x01861039, 0x00, "SiS 968", 0},
{0xa01c177d, 0x00, "ThunderX", AHCI_Q_ABAR0|AHCI_Q_1MSI},
- {0x00311c36, 0x00, "Annapurna", AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP},
+ {0x00311c36, 0x00, "Annapurna", AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP|AHCI_Q_NOMSIX},
{0x00000000, 0x00, NULL, 0}
};
@@ -437,6 +437,9 @@
&ctlr->r_rid, RF_ACTIVE)))
return ENXIO;
+ if (ctlr->quirks & AHCI_Q_NOMSIX)
+ msix_count = 0;
+
/* Read MSI-x BAR IDs if supported */
if (msix_count > 0) {
error = ahci_pci_read_msix_bars(dev, &table_bar, &pba_bar);
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D4301: Disable MSI-x for AHCI on Alpine plattform
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